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https://github.com/openhwgroup/cvw
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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commit
d2e3e14cbc
15
wally-pipelined/src/cache/ICacheCntrl.sv
vendored
15
wally-pipelined/src/cache/ICacheCntrl.sv
vendored
@ -115,8 +115,8 @@ module ICacheCntrl #(parameter BLOCKLEN = 256)
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localparam STATE_INVALIDATE = 'h12; // *** not sure if invalidate or evict? invalidate by cache block or address?
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localparam STATE_TLB_MISS = 'h13;
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localparam STATE_TLB_MISS_DONE = 'h14;
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localparam STATE_INSTR_PAGE_FAULT = 'h15;
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localparam AHBByteLength = `XLEN / 8;
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localparam AHBOFFETWIDTH = $clog2(AHBByteLength);
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@ -370,13 +370,20 @@ module ICacheCntrl #(parameter BLOCKLEN = 256)
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NextState = STATE_READY;
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end
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STATE_TLB_MISS: begin
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if (ITLBWriteF | WalkerInstrPageFaultF) begin
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if (WalkerInstrPageFaultF) begin
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NextState = STATE_INSTR_PAGE_FAULT;
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ICacheStallF = 1'b0;
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end else if (ITLBWriteF) begin
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NextState = STATE_TLB_MISS_DONE;
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end else begin
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NextState = STATE_TLB_MISS;
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end
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end
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STATE_TLB_MISS_DONE : begin
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STATE_TLB_MISS_DONE: begin
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NextState = STATE_READY;
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end
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STATE_INSTR_PAGE_FAULT: begin
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ICacheStallF = 1'b0;
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NextState = STATE_READY;
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end
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default: begin
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