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https://github.com/openhwgroup/cvw
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commit
cb597d2c85
@ -37,6 +37,8 @@
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# SV39 and SV48 supported
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# SV39 and SV48 supported
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--override cpu/Sv_modes=768
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--override cpu/Sv_modes=768
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--override cpu/Svinval=T
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# clarify
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# clarify
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#--override refRoot/cpu/mtvec_sext=F
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#--override refRoot/cpu/mtvec_sext=F
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@ -300,6 +300,8 @@ sretdone:
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# Test uncovered privdec instructions
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# Test uncovered privdec instructions
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li a0, 3
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ecall
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# exercise sfence.inval.ir instruction
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# exercise sfence.inval.ir instruction
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.word 0x18100073
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.word 0x18100073
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@ -307,7 +309,20 @@ sretdone:
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.word 0x102F8073
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.word 0x102F8073
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j done
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# cover mret when mpp = 3 and mprv = 1
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li a0, 3
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ecall # enter machine mode
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bseti t0, zero, 17
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csrs mstatus, t0 # set MPRV
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li t1, 0x00001800
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csrs mstatus, t1 # set MPP=3
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la t1, finished
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csrr t0, mepc
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csrw mepc, t1 # set mepc for mret to jump to
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mret
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finished: j done
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