From bdd0043cd1564dcb866a47ff95622868dde01583 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Thu, 9 May 2024 07:58:53 -0700
Subject: [PATCH] Testbench terminates buildroot sim at instruction limit

---
 testbench/testbench.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/testbench/testbench.sv b/testbench/testbench.sv
index 87e517b63..084bf02c5 100644
--- a/testbench/testbench.sv
+++ b/testbench/testbench.sv
@@ -644,7 +644,7 @@ module testbench;
     always @(negedge clk) begin
       if (INSTR_LIMIT > 0) begin
         if((Minstret != 0) && (Minstret % 'd100000 == 0)) $display("Reached %d instructions", Minstret);
-        if((Minstret == INSTR_LIMIT) & (INSTR_LIMIT!=0)) begin $stop; $stop; end
+        if((Minstret == INSTR_LIMIT) & (INSTR_LIMIT!=0)) begin $finish; end
       end
     end
 end