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Fixed asign and bsign

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This commit is contained in:
cturek 2022-11-09 18:41:26 +00:00
parent f7b94c12fc
commit b723e16893
1 changed files with 2 additions and 2 deletions
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4
pipelined/src/fpu/fdivsqrt/fdivsqrtpreproc.sv
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@ -67,8 +67,8 @@ module fdivsqrtpreproc (
// ***can probably merge X LZC with conversion // ***can probably merge X LZC with conversion
// cout the number of leading zeros // cout the number of leading zeros
assign As = ForwardedSrcAE[`XLEN-1] & Funct3E[0]; assign As = ForwardedSrcAE[`XLEN-1] & ~Funct3E[0];
assign Bs = ForwardedSrcBE[`XLEN-1] & Funct3E[0]; assign Bs = ForwardedSrcBE[`XLEN-1] & ~Funct3E[0];
assign A64 = W64E ? {{(`XLEN-32){As}}, ForwardedSrcAE[31:0]} : ForwardedSrcAE; assign A64 = W64E ? {{(`XLEN-32){As}}, ForwardedSrcAE[31:0]} : ForwardedSrcAE;
assign B64 = W64E ? {{(`XLEN-32){Bs}}, ForwardedSrcBE[31:0]} : ForwardedSrcBE; assign B64 = W64E ? {{(`XLEN-32){Bs}}, ForwardedSrcBE[31:0]} : ForwardedSrcBE;