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Fixed asign and bsign
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@ -67,8 +67,8 @@ module fdivsqrtpreproc (
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// ***can probably merge X LZC with conversion
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// cout the number of leading zeros
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assign As = ForwardedSrcAE[`XLEN-1] & Funct3E[0];
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assign Bs = ForwardedSrcBE[`XLEN-1] & Funct3E[0];
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assign As = ForwardedSrcAE[`XLEN-1] & ~Funct3E[0];
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assign Bs = ForwardedSrcBE[`XLEN-1] & ~Funct3E[0];
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assign A64 = W64E ? {{(`XLEN-32){As}}, ForwardedSrcAE[31:0]} : ForwardedSrcAE;
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assign B64 = W64E ? {{(`XLEN-32){Bs}}, ForwardedSrcBE[31:0]} : ForwardedSrcBE;
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