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Merge pull request #371 from ross144/main

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Fixed a very subtle combinational loop bug the SSTC implementation of csrs.sv.  STIMCMPH did not assign all XLEN bits of CSRSReadValM so dc_shell produced d-latches and vivado created a combinational loop.
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David Harris 2023-07-28 09:51:58 -07:00 committed by GitHub
commit b47ce62a97
1 changed files with 2 additions and 2 deletions
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src/privileged/csrs.sv
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@ -157,7 +157,7 @@ module csrs import cvw::*; #(parameter cvw_t P) (
IllegalCSRSAccessM = 1;
end
STIMECMPH: if (STCE)
CSRSReadValM[31:0] = STIMECMP_REGW[63:32];
CSRSReadValM = {{(P.XLEN-32){1'b0}}, STIMECMP_REGW[63:32]};
else begin // not supported for RV64
CSRSReadValM = 0;
IllegalCSRSAccessM = 1;