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added 32 bit versions of new tests. all but timeout wait pass regression

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This commit is contained in:
Kip Macsai-Goren 2022-04-27 18:18:12 +00:00
parent 64a537c59b
commit aedf0341af
10 changed files with 4311 additions and 17 deletions
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39
pipelined/testbench/tests.vh
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@ -54,7 +54,9 @@ string tvpaths[] = '{
string wally32a[] = '{
`WALLYTEST,
"rv32i_m/privilege/WALLY-AMO", "2310",
"rv32i_m/privilege/WALLY-LRSC", "2310"
"rv32i_m/privilege/WALLY-LRSC", "2310",
"rv32i_m/privilege/WALLY-status-fp-enabled-01", "5080"
};
// *** restore CSR tests from Imperas old
@ -1546,22 +1548,25 @@ string wally32i[] = '{
string wally32priv[] = '{
`WALLYTEST,
"rv32i_m/privilege/WALLY-CSR-permission-s-01", "006080",
"rv32i_m/privilege/WALLY-CSR-permission-u-01", "006080",
"rv32i_m/privilege/WALLY-minfo-01", "005080",
"rv32i_m/privilege/WALLY-misa-01", "005080",
"rv32i_m/privilege/WALLY-MMU-SV32", "005080",
"rv32i_m/privilege/WALLY-PMA", "005080",
"rv32i_m/privilege/WALLY-PMP", "005080",
"rv32i_m/privilege/WALLY-trap-01", "005080",
"rv32i_m/privilege/WALLY-trap-s-01", "005080",
"rv32i_m/privilege/WALLY-trap-u-01", "005080",
"rv32i_m/privilege/WALLY-MIE-01", "005080",
"rv32i_m/privilege/WALLY-mtvec-01", "005080",
"rv32i_m/privilege/WALLY-stvec-01", "005080",
"rv32i_m/privilege/WALLY-PIE-stack-01", "005080",
"rv32i_m/privilege/WALLY-PIE-stack-s-01", "005080",
"rv32i_m/privilege/WALLY-trap-sret-01", "005080"
"rv32i_m/privilege/WALLY-CSR-permission-s-01", "6080",
"rv32i_m/privilege/WALLY-CSR-permission-u-01", "6080",
"rv32i_m/privilege/WALLY-minfo-01", "5080",
"rv32i_m/privilege/WALLY-misa-01", "5080",
"rv32i_m/privilege/WALLY-MMU-SV32", "5080",
"rv32i_m/privilege/WALLY-PMA", "5080",
"rv32i_m/privilege/WALLY-PMP", "5080",
"rv32i_m/privilege/WALLY-trap-01", "5080",
"rv32i_m/privilege/WALLY-trap-s-01", "5080",
"rv32i_m/privilege/WALLY-trap-u-01", "5080",
"rv32i_m/privilege/WALLY-MIE-01", "5080",
"rv32i_m/privilege/WALLY-mtvec-01", "5080",
"rv32i_m/privilege/WALLY-stvec-01", "5080",
"rv32i_m/privilege/WALLY-PIE-stack-01", "5080",
"rv32i_m/privilege/WALLY-PIE-stack-s-01", "5080",
"rv32i_m/privilege/WALLY-trap-sret-01", "5080",
// "rv32i_m/privilege/WALLY-status-tw-01", "5080",
"rv32i_m/privilege/WALLY-WFI-01", "5080",
"rv32i_m/privilege/WALLY-status-fp-disabled-01", "5080"
};

4
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/Makefrag
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@ -50,6 +50,10 @@ target_tests_nosim = \
WALLY-trap-01 \
WALLY-trap-s-01 \
WALLY-trap-u-01 \
WALLY-status-tw-01 \
WALLY-WFI-01 \
WALLY-status-fp-enabled-01 \
WALLY-status-fp-disabled-01 \
rv32i_tests = $(addsuffix .elf, $(rv32i_sc_tests))

1015
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-WFI-01.reference_output Normal file
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1013
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-status-fp-disabled-01.reference_output Normal file
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1015
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-status-fp-enabled-01.reference_output Normal file
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1015
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/references/WALLY-status-tw-01.reference_output Normal file
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65
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-WFI-01.S Normal file
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@ -0,0 +1,65 @@
///////////////////////////////////////////
//
// WALLY-wait-for-interrupt
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-04-24
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m, DEBUG=1 // turn on recording mtval and status bits on traps
li x28, 0x8
csrs mstatus, x28 // set mstatus.MIE bit to 1
WRITE_READ_CSR mie, 0xFFF // Enable interrupts from all sources
// Code copied from test library to cause m time interrupt, with time loop replaced with wfi.
li x28, 0x40 // Desired offset from the present time
mv a3, x28 // copy value in to know to stop waiting for interrupt after this many cycles
la x29, 0x02004000 // MTIMECMP register in CLINT
la x30, 0x0200BFF8 // MTIME register in CLINT
lw x7, 0(x30) // low word of MTIME
lw x31, 4(x30) // high word of MTIME
add x28, x7, x28 // add desired offset to the current time
bgtu x28, x7, nowrap // check new time exceeds current time (no wraparound)
addi x31, x31, 1 // if wrap, increment most significant word
sw x31,4(x29) // store into most significant word of MTIMECMP
nowrap:
sw x28, 0(x29) // store into least significant word of MTIMECMP
auipc ra, 0x0
addi ra, ra, 0xC // load address after wfi into ra so we return to the right place after handling the time interrupt
wfi // test wfi until trap goes off
li x28, 0x600d111 // magic number "good 111" to write to output after interrupt goes off.
// this tests whether wfi is a nop or not since we should get the output for the interrupt before this one
sw x28, 0(x6)
addi x6, x6, 4
addi x16, x16, 4
END_TESTS
TEST_STACK_AND_DATA

49
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-fp-disabled-01.S Normal file
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@ -0,0 +1,49 @@
///////////////////////////////////////////
//
// WALLY-status-floating-point
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-04-24
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m
// Misa.F is already 0 in this config, making floating point diabled
li x28, 0x80006000 // mask bits for SD and FS bits of status csr
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read disabled FS, SD bits, which should both be 0
addi x6, x6, 4
addi x16, x16, 4
csrs mstatus, x28 // attempt to write 11 and 1 to fs and sd in mstatus (this should not work)
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read disabled FS, SD bits, which should both be 0
addi x6, x6, 4
addi x16, x16, 4
END_TESTS
TEST_STACK_AND_DATA

69
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-fp-enabled-01.S Normal file
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@ -0,0 +1,69 @@
///////////////////////////////////////////
//
// WALLY-status-floating-point
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-04-24
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m
// Misa.F is already 1 in this config, making floating point enabled
li x28, 0x80006000 // mask bits for SD and FS bits of status csr
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read initial FS, SD bits, which should be 01 and 0 respectively
addi x6, x6, 4
addi x16, x16, 4
flw f1, 0(x6) // make FS dirty by loading random value in
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read dirty FS, SD bits, which should be 11 and 1 respectively
addi x6, x6, 4
addi x16, x16, 4
li x29, 0x4000
csrs mstatus, x29
li x29, 0x80002000
csrc mstatus, x29 // set SD to 0 and FS to 10 by writing mstatus
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read written FS, SD bits to confirm previous write
addi x6, x6, 4
addi x16, x16, 4
flw f1, 0(x6) // make FS dirty by loading random value in
csrr x29, mstatus
and x29, x29, x28
sw x29, 0(x6) // read dirty FS, SD bits, which should be 11 and 1 respectively
addi x6, x6, 4
addi x16, x16, 4
END_TESTS
TEST_STACK_AND_DATA

44
tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-status-tw-01.S Normal file
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@ -0,0 +1,44 @@
///////////////////////////////////////////
//
// WALLY-status-timeout-wait
//
// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
//
// Created 2022-04-24
//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////
#include "WALLY-TEST-LIB-32.h"
INIT_TESTS
TRAP_HANDLER m, DEBUG=1 // turn on recording mtval and status bits on traps
li x28, 0x200000
csrs mstatus, x28 // set mstatus.TW bit to 1
GOTO_S_MODE // go to S mode so the TW can be triggered
nop
nop
nop // let the ecall go through the pipeline before testing the wfi instruction
wfi // call wfi when there's no interrupt to wait for
// eventually should cause illegal instruction
END_TESTS
TEST_STACK_AND_DATA