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https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
added area + timing grabber to synth-fp
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parent
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commit
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52
synthDC/scripts/fp-synth.sh
Normal file → Executable file
52
synthDC/scripts/fp-synth.sh
Normal file → Executable file
@ -43,7 +43,7 @@ sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d2/" $WALLY/config/rv32
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}
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}
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# IDIVBITS = 4
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# IDIVBITS = 4
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setIDIVBITSeq1 () {
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setIDIVBITSeq4 () {
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sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv64gc/config.vh
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sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv64gc/config.vh
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sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv32gc/config.vh
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sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv32gc/config.vh
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}
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}
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@ -77,7 +77,30 @@ make -C $WALLY/synthDC synth DESIGN=drsu TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAP
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make -C $WALLY/synthDC synth DESIGN=drsu TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=drsu TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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}
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}
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synthAll () {
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synthIntDiv
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synthFPDiv
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}
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# Synthesize DivSqrt Preprocessor
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synthFPDivsqrtpreproc () {
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv32gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv64gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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}
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synthFPDiviter () {
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv32gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv64gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
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}
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# forms title for synthesis
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# forms title for synthesis
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getTitle () {
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getTitle () {
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RADIX=$(sed -n "157p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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RADIX=$(sed -n "157p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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K=$(sed -n "158p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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K=$(sed -n "158p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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@ -85,4 +108,29 @@ IDIV=$(sed -n "81p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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IDIVBITS=$(sed -n "80p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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IDIVBITS=$(sed -n "80p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
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title="RADIX_${RADIX}_K_${K}_INTDIV_${IDIV}_IDIVBITS_${IDIVBITS}"
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title="RADIX_${RADIX}_K_${K}_INTDIV_${IDIV}_IDIVBITS_${IDIVBITS}"
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echo $title
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echo $title
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}
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}
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# writes area delay of runs to csv
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writeCSV () {
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# iterate over all files in runs/
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for FILE in $WALLY/synthDC/runs/*;
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do
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design="${FILE##*/}"
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# grab area
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areaString=($(grep "Total cell area" $FILE/reports/area.rep))
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area=${areaString[3]}
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echo $area
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# grab timing
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timingString=($(grep "data arrival time" $FILE/reports/timing.rep))
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timing=${timingString[3]}
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echo $timing
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done;
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}
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setKeq1
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setRADIXeq4
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synthAll
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setKeq2
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setRADIXeq2
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synthAll
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