From ac458995cae3dd490973075f863c5317aade6425 Mon Sep 17 00:00:00 2001
From: Kevin Kim <kevindkim723@gmail.com>
Date: Fri, 20 Oct 2023 20:04:18 -0700
Subject: [PATCH] added area + timing grabber to synth-fp

---
 synthDC/scripts/fp-synth.sh | 52 +++++++++++++++++++++++++++++++++++--
 1 file changed, 50 insertions(+), 2 deletions(-)
 mode change 100644 => 100755 synthDC/scripts/fp-synth.sh

diff --git a/synthDC/scripts/fp-synth.sh b/synthDC/scripts/fp-synth.sh
old mode 100644
new mode 100755
index 2fbdf5b14..35fa54ac8
--- a/synthDC/scripts/fp-synth.sh
+++ b/synthDC/scripts/fp-synth.sh
@@ -43,7 +43,7 @@ sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d2/" $WALLY/config/rv32
 }
 
 # IDIVBITS = 4
-setIDIVBITSeq1 () {
+setIDIVBITSeq4 () {
 sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv64gc/config.vh
 sed -i "80s/IDIV_BITSPERCYCLE.*/IDIV_BITSPERCYCLE = 32;\'d4/" $WALLY/config/rv32gc/config.vh
 }
@@ -77,7 +77,30 @@ make -C $WALLY/synthDC synth DESIGN=drsu TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAP
 make -C $WALLY/synthDC synth DESIGN=drsu TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
 }
 
+synthAll () {
+    synthIntDiv
+    synthFPDiv
+}
+
+
+# Synthesize DivSqrt Preprocessor
+
+synthFPDivsqrtpreproc () {
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv32gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv64gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtpreproc TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
+}
+
+synthFPDiviter () {
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv32gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv64gc FREQ=3000 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv32gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
+make -C $WALLY/synthDC synth DESIGN=fdivsqrtiter TECH=tsmc28 CONFIG=rv64gc FREQ=100 WRAPPER=1 TITLE=$(getTitle)
+}
+
 # forms title for synthesis
+
 getTitle () {
 RADIX=$(sed -n "157p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
 K=$(sed -n "158p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
@@ -85,4 +108,29 @@ IDIV=$(sed -n "81p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
 IDIVBITS=$(sed -n "80p" $WALLY/config/rv64gc/config.vh | tail -c 3 | head -c 1)
 title="RADIX_${RADIX}_K_${K}_INTDIV_${IDIV}_IDIVBITS_${IDIVBITS}"
 echo $title
-}
\ No newline at end of file
+}
+
+# writes area delay of runs to csv
+writeCSV () {
+    # iterate over all files in runs/
+    for FILE in $WALLY/synthDC/runs/*;
+    do
+        design="${FILE##*/}"
+        # grab area
+        areaString=($(grep "Total cell area" $FILE/reports/area.rep))
+        area=${areaString[3]}
+        echo $area
+        # grab timing
+        timingString=($(grep "data arrival time" $FILE/reports/timing.rep))
+        timing=${timingString[3]}
+        echo $timing
+        
+    done;
+}
+
+setKeq1
+setRADIXeq4
+synthAll
+setKeq2
+setRADIXeq2
+synthAll
\ No newline at end of file