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Merge pull request #733 from ross144/main

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Fixed merge conflict bug in the last pull request.
This commit is contained in:
David Harris 2024-04-16 09:34:16 -06:00 committed by GitHub
commit a78e6cda8a
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GPG Key ID: B5690EEEBB952194
3 changed files with 17 additions and 35 deletions
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4
sim/questa/coverage-exclusions-rv64gc.do
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@ -64,7 +64,7 @@ coverage exclude -scope /dut/core/fpu/fpu/postprocess/cvtshiftcalc -linerange [G
# This is cleaner than trying to set an I$-specific pragma in cachefsm.sv (which would exclude it for the D$ instance too)
# Also exclude the write line to ready transition for the I$ since we can't get a flush during this operation.
coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -fstate CurrState STATE_FLUSH STATE_FLUSH_WRITEBACK STATE_FLUSH_WRITEBACK STATE_WRITEBACK
coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -ftrans CurrState STATE_WRITE_LINE->STATE_READY STATE_FETCH->STATE_READY
coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -ftrans CurrState STATE_WRITE_LINE->STATE_ACCESS STATE_FETCH->STATE_ACCESS
# exclude unused transitions from case statement. Unfortunately the whole branch needs to be excluded I think. Expression coverage should still work.
coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ${SRC}/cache/cachefsm.sv "exclusion-tag: icache state-case"] -item b 1
# I$ does not flush
@ -151,7 +151,7 @@ for {set i 0} {$i < $numcacheways} {incr i} {
# Not right; other ways can get flushed and dirtied simultaneously coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/CacheWays[$i] -linerange [GetLineNum ${SRC}/cache/cacheway.sv "exclusion-tag: cache UpdateDirty"] -item c 1 -feccondrow 6
}
# D$ writeback, flush, write_line, or flush_writeback states can't be cancelled by a flush
coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -ftrans CurrState STATE_WRITEBACK->STATE_READY STATE_FLUSH->STATE_READY STATE_WRITE_LINE->STATE_READY STATE_FLUSH_WRITEBACK->STATE_READY
coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -ftrans CurrState STATE_WRITEBACK->STATE_ACCESS STATE_FLUSH->STATE_ACCESS STATE_WRITE_LINE->STATE_ACCESS STATE_FLUSH_WRITEBACK->STATE_ACCESS
####################
# Unused / illegal peripheral accesses

32
sim/questa/wally.do
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@ -69,6 +69,19 @@ if {$argc >= 3} {
set tbArgs $lst
}
set tbArgsLst [split $lst " "]
set index [lsearch -exact $tbArgsLst "-coverage"]
if {$index >= 0} {
set coverage 1
set CoverageVoptArg "+cover=sbecf"
set CoverageVsimArg "-coverage"
echo $tbArgsLst
set tbArgsLst [lreplace $tbArgsLst $index $index ]
echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
echo $tbArgsLst
echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!"
}
# separate the +args from the -G parameters
foreach otherArg $tbArgsLst {
if {[string index $otherArg 0] eq "+"} {
@ -77,21 +90,6 @@ if {$argc >= 3} {
lappend ParamArgs $otherArg
}
}
#echo "PlusArgs"
#echo $PlusArgs
#echo "ParamArgs"
#echo $ParamArgs
#echo "accFlag"
#echo $accFlag
#if {$3 eq "-coverage" || ($argc >= 7 && $7 eq "-coverage")} {
# set coverage 1
# set CoverageVoptArg "+cover=sbecf"
# set CoverageVsimArg "-coverage"
#} elseif {$3 eq "tbArgs"} {
# set tbArgs $lst
# puts $tbArgs
#}
}
# compile source files
@ -99,11 +97,11 @@ if {$argc >= 3} {
# "Extra checking for conflicts with always_comb done at vopt time"
# because vsim will run vopt
vlog -lint -work ${WKDIR} +incdir+${CONFIG}/$1 +incdir+${CONFIG}/deriv/$1 +incdir+${CONFIG}/shared ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
vlog -lint -work ${WKDIR} +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286
# start and run simulation
# remove +acc flag for faster sim during regressions if there is no need to access internal signals
vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${tbArgs} -o testbenchopt ${CoverageVoptArg}
vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${tbArgsLst} -o testbenchopt ${CoverageVoptArg}
# *** tbArgs producees a warning that TEST not found in design when running sim-testfloat-batch. Need to separate -G and + arguments to pass separately to vopt and vsim
vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 -suppress 3829 ${CoverageVsimArg}

16
testbench/testbench.sv
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@ -868,25 +868,9 @@ end
// Check errors
testadr = ($unsigned(begin_signature_addr))/(P.XLEN/8);
testadrNoBase = (begin_signature_addr - P.UNCORE_RAM_BASE)/(P.XLEN/8);
// logic UNCORE_RAM_SUPPORTED;
// if(P.UNCORE_RAM_SUPPORTED)
// assign UNCORE_RAM_SUPPORTED = P.UNCORE_RAM_SUPPORTED;
// else
// assign UNCORE_RAM_SUPPORTED = 0;
for (i=0; i<sigentries; i++) begin
// **************************************
// ***** BUG BUG BUG make sure RT undoes this.
//if (P.DTIM_SUPPORTED) sig = testbench.dut.core.lsu.dtim.dtim.ram.RAM[testadrNoBase+i];
//else if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncoregen.uncore.ram.ram.memory.RAM[testadrNoBase+i];
if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncoregen.uncore.ram.ram.memory.RAM[testadrNoBase+i];
//if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncoregen.uncore.ram.ram.memory.RAM[testadrNoBase+i];
//$display("signature[%h] = %h sig = %h", i, signature[i], sig);
//if (signature[i] !== sig & (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i])) begin
if (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i]) begin
errors = errors+1;
// $display(" Error on test %s result %d: adr = %h sim (D$) %h sim (DTIM_SUPPORTED) = %h, signature = %h",
// TestName, i, (testadr+i)*(P.XLEN/8), testbench.DCacheFlushFSM.ShadowRAM[testadr+i], sig, signature[i]);
$display(" Error on test %s result %d: adr = %h sim (D$) %h signature = %h",
TestName, i, (testadr+i)*(P.XLEN/8), testbench.DCacheFlushFSM.ShadowRAM[testadr+i], signature[i]);
$stop; // if this is changed to $finish, wally-batch.do does not get to the next step to run coverage