From 1eb1beed957113ac42f73175148e89981703fed5 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Tue, 16 Apr 2024 10:32:24 -0500 Subject: [PATCH] Fixed merge conflict bug in the last pull request. --- sim/questa/coverage-exclusions-rv64gc.do | 4 +-- sim/questa/wally.do | 32 +++++++++++------------- testbench/testbench.sv | 16 ------------ 3 files changed, 17 insertions(+), 35 deletions(-) diff --git a/sim/questa/coverage-exclusions-rv64gc.do b/sim/questa/coverage-exclusions-rv64gc.do index 3331c4574..5dc94d50e 100644 --- a/sim/questa/coverage-exclusions-rv64gc.do +++ b/sim/questa/coverage-exclusions-rv64gc.do @@ -64,7 +64,7 @@ coverage exclude -scope /dut/core/fpu/fpu/postprocess/cvtshiftcalc -linerange [G # This is cleaner than trying to set an I$-specific pragma in cachefsm.sv (which would exclude it for the D$ instance too) # Also exclude the write line to ready transition for the I$ since we can't get a flush during this operation. coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -fstate CurrState STATE_FLUSH STATE_FLUSH_WRITEBACK STATE_FLUSH_WRITEBACK STATE_WRITEBACK -coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -ftrans CurrState STATE_WRITE_LINE->STATE_READY STATE_FETCH->STATE_READY +coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -ftrans CurrState STATE_WRITE_LINE->STATE_ACCESS STATE_FETCH->STATE_ACCESS # exclude unused transitions from case statement. Unfortunately the whole branch needs to be excluded I think. Expression coverage should still work. coverage exclude -scope /dut/core/ifu/bus/icache/icache/cachefsm -linerange [GetLineNum ${SRC}/cache/cachefsm.sv "exclusion-tag: icache state-case"] -item b 1 # I$ does not flush @@ -151,7 +151,7 @@ for {set i 0} {$i < $numcacheways} {incr i} { # Not right; other ways can get flushed and dirtied simultaneously coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/CacheWays[$i] -linerange [GetLineNum ${SRC}/cache/cacheway.sv "exclusion-tag: cache UpdateDirty"] -item c 1 -feccondrow 6 } # D$ writeback, flush, write_line, or flush_writeback states can't be cancelled by a flush -coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -ftrans CurrState STATE_WRITEBACK->STATE_READY STATE_FLUSH->STATE_READY STATE_WRITE_LINE->STATE_READY STATE_FLUSH_WRITEBACK->STATE_READY +coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -ftrans CurrState STATE_WRITEBACK->STATE_ACCESS STATE_FLUSH->STATE_ACCESS STATE_WRITE_LINE->STATE_ACCESS STATE_FLUSH_WRITEBACK->STATE_ACCESS #################### # Unused / illegal peripheral accesses diff --git a/sim/questa/wally.do b/sim/questa/wally.do index 184da43d0..33832516b 100644 --- a/sim/questa/wally.do +++ b/sim/questa/wally.do @@ -69,6 +69,19 @@ if {$argc >= 3} { set tbArgs $lst } set tbArgsLst [split $lst " "] + + set index [lsearch -exact $tbArgsLst "-coverage"] + if {$index >= 0} { + set coverage 1 + set CoverageVoptArg "+cover=sbecf" + set CoverageVsimArg "-coverage" + echo $tbArgsLst + set tbArgsLst [lreplace $tbArgsLst $index $index ] + echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!" + echo $tbArgsLst + echo "help help help !!!!!!!!!!!!!!!!!!!!!!!!!!!" + } + # separate the +args from the -G parameters foreach otherArg $tbArgsLst { if {[string index $otherArg 0] eq "+"} { @@ -77,21 +90,6 @@ if {$argc >= 3} { lappend ParamArgs $otherArg } } - #echo "PlusArgs" - #echo $PlusArgs - #echo "ParamArgs" - #echo $ParamArgs - #echo "accFlag" - #echo $accFlag - - #if {$3 eq "-coverage" || ($argc >= 7 && $7 eq "-coverage")} { - # set coverage 1 - # set CoverageVoptArg "+cover=sbecf" - # set CoverageVsimArg "-coverage" - #} elseif {$3 eq "tbArgs"} { - # set tbArgs $lst - # puts $tbArgs - #} } # compile source files @@ -99,11 +97,11 @@ if {$argc >= 3} { # "Extra checking for conflicts with always_comb done at vopt time" # because vsim will run vopt -vlog -lint -work ${WKDIR} +incdir+${CONFIG}/$1 +incdir+${CONFIG}/deriv/$1 +incdir+${CONFIG}/shared ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286 +vlog -lint -work ${WKDIR} +incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared ${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv -suppress 2583 -suppress 7063,2596,13286 # start and run simulation # remove +acc flag for faster sim during regressions if there is no need to access internal signals -vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${tbArgs} -o testbenchopt ${CoverageVoptArg} +vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${tbArgsLst} -o testbenchopt ${CoverageVoptArg} # *** tbArgs producees a warning that TEST not found in design when running sim-testfloat-batch. Need to separate -G and + arguments to pass separately to vopt and vsim vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 -suppress 3829 ${CoverageVsimArg} diff --git a/testbench/testbench.sv b/testbench/testbench.sv index e16a265ea..2d70bb898 100644 --- a/testbench/testbench.sv +++ b/testbench/testbench.sv @@ -868,25 +868,9 @@ end // Check errors testadr = ($unsigned(begin_signature_addr))/(P.XLEN/8); testadrNoBase = (begin_signature_addr - P.UNCORE_RAM_BASE)/(P.XLEN/8); - // logic UNCORE_RAM_SUPPORTED; - // if(P.UNCORE_RAM_SUPPORTED) - // assign UNCORE_RAM_SUPPORTED = P.UNCORE_RAM_SUPPORTED; - // else - // assign UNCORE_RAM_SUPPORTED = 0; for (i=0; i