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Commented about Sstvecd trap vector alignment

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David Harris 2023-04-24 12:20:33 -07:00
parent ee6a3f49f0
commit a5087818ba
1 changed files with 1 additions and 1 deletions
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src/privileged/csr.sv
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@ -158,7 +158,7 @@ module csr #(parameter
assign TVecPlusCauseM = {TVecAlignedM[`XLEN-1:6], CauseM, 2'b00}; // 64-byte alignment allows concatenation rather than addition assign TVecPlusCauseM = {TVecAlignedM[`XLEN-1:6], CauseM, 2'b00}; // 64-byte alignment allows concatenation rather than addition
mux2 #(`XLEN) trapvecmux(TVecAlignedM, TVecPlusCauseM, VectoredM, TrapVectorM); mux2 #(`XLEN) trapvecmux(TVecAlignedM, TVecPlusCauseM, VectoredM, TrapVectorM);
end else end else
assign TrapVectorM = TVecAlignedM; assign TrapVectorM = TVecAlignedM; // unvectored interrupt handler can be at any word-aligned address. This is called Sstvecd
// Trap Returns // Trap Returns
// A trap sets the PC to TrapVector // A trap sets the PC to TrapVector