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David Harris
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@ -1,184 +0,0 @@
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//////////////////////////////////////////
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// config.vh
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//
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// Written: David_Harris@hmc.edu 4 January 2021
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// Modified:
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//
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// Purpose: Specify which features are configured
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// Macros to determine which modes are supported based on MISA
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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// include shared configuration
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`include "BranchPredictorType.vh"
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// RV32 or RV64: XLEN = 32 or 64
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localparam XLEN = 32'd64;
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// IEEE 754 compliance
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localparam IEEE754 = 0;
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localparam MISA = (32'h0014112D);
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localparam ZICSR_SUPPORTED = 1;
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localparam ZIFENCEI_SUPPORTED = 1;
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localparam ZICNTR_SUPPORTED = 1;
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localparam ZIHPM_SUPPORTED = 1;
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localparam COUNTERS = 12'd32;
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localparam ZFH_SUPPORTED = 1;
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localparam ZFA_SUPPORTED = 0;
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localparam SSTC_SUPPORTED = 1;
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localparam ZICBOM_SUPPORTED = 1;
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localparam ZICBOZ_SUPPORTED = 1;
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localparam ZICBOP_SUPPORTED = 1;
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localparam ZICCLSM_SUPPORTED = 1;
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localparam ZICOND_SUPPORTED = 1;
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localparam SVPBMT_SUPPORTED = 1;
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localparam SVNAPOT_SUPPORTED = 1;
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localparam SVINVAL_SUPPORTED = 1;
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// LSU microarchitectural Features
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localparam BUS_SUPPORTED = 1;
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localparam DCACHE_SUPPORTED = 1;
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localparam ICACHE_SUPPORTED = 1;
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localparam VIRTMEM_SUPPORTED = 1;
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localparam VECTORED_INTERRUPTS_SUPPORTED = 1;
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localparam BIGENDIAN_SUPPORTED = 1;
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// TLB configuration. Entries should be a power of 2
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localparam ITLB_ENTRIES = 32'd32;
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localparam DTLB_ENTRIES = 32'd32;
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// Cache configuration. Sizes should be a power of two
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// typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
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localparam DCACHE_NUMWAYS = 32'd4;
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localparam DCACHE_WAYSIZEINBYTES = 32'd4096;
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localparam DCACHE_LINELENINBITS = 32'd512;
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localparam ICACHE_NUMWAYS = 32'd4;
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localparam ICACHE_WAYSIZEINBYTES = 32'd4096;
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localparam ICACHE_LINELENINBITS = 32'd512;
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localparam CACHE_SRAMLEN = 32'd128;
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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localparam IDIV_BITSPERCYCLE = 32'd4;
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localparam IDIV_ON_FPU = 1;
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// Legal number of PMP entries are 0, 16, or 64
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localparam PMP_ENTRIES = 32'd16;
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// Address space
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localparam logic [63:0] RESET_VECTOR = 64'h0000000000001000;
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// WFI Timeout Wait
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localparam WFI_TIMEOUT_BIT = 32'd16;
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// Peripheral Addresses
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// Peripheral memory space extends from BASE to BASE+RANGE
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// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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localparam DTIM_SUPPORTED = 1'b0;
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localparam logic [63:0] DTIM_BASE = 64'h80000000;
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localparam logic [63:0] DTIM_RANGE = 64'h00001FFF;
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localparam IROM_SUPPORTED = 1'b0;
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localparam logic [63:0] IROM_BASE = 64'h80000000;
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localparam logic [63:0] IROM_RANGE = 64'h00001FFF;
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localparam BOOTROM_SUPPORTED = 1'b1;
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localparam logic [63:0] BOOTROM_BASE = 64'h00001000 ;
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localparam logic [63:0] BOOTROM_RANGE = 64'h00000FFF;
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localparam BOOTROM_PRELOAD = 1'b1;
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localparam UNCORE_RAM_SUPPORTED = 1'b1;
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localparam logic [63:0] UNCORE_RAM_BASE = 64'h80000000;
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localparam logic [63:0] UNCORE_RAM_RANGE = 64'h0FFFFFFF;
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localparam UNCORE_RAM_PRELOAD = 1'b1;
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localparam EXT_MEM_SUPPORTED = 1'b0;
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localparam logic [63:0] EXT_MEM_BASE = 64'h80000000;
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localparam logic [63:0] EXT_MEM_RANGE = 64'h07FFFFFF;
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localparam CLINT_SUPPORTED = 1'b1;
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localparam logic [63:0] CLINT_BASE = 64'h02000000;
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localparam logic [63:0] CLINT_RANGE = 64'h0000FFFF;
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localparam GPIO_SUPPORTED = 1'b1;
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localparam logic [63:0] GPIO_BASE = 64'h10060000;
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localparam logic [63:0] GPIO_RANGE = 64'h000000FF;
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localparam UART_SUPPORTED = 1'b1;
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localparam logic [63:0] UART_BASE = 64'h10000000;
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localparam logic [63:0] UART_RANGE = 64'h00000007;
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localparam PLIC_SUPPORTED = 1'b1;
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localparam logic [63:0] PLIC_BASE = 64'h0C000000;
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localparam logic [63:0] PLIC_RANGE = 64'h03FFFFFF;
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localparam SDC_SUPPORTED = 1'b0;
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localparam logic [63:0] SDC_BASE = 64'h00013000;
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localparam logic [63:0] SDC_RANGE = 64'h0000007F;
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localparam SPI_SUPPORTED = 1'b1;
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localparam logic [63:0] SPI_BASE = 64'h10040000;
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localparam logic [63:0] SPI_RANGE = 64'h00000FFF;
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// Bus Interface width
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localparam AHBW = 32'd64;
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// AHB
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localparam RAM_LATENCY = 32'b0;
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localparam BURST_EN = 1;
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// Test modes
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// Tie GPIO outputs back to inputs
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localparam GPIO_LOOPBACK_TEST = 0;
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localparam SPI_LOOPBACK_TEST = 0;
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// Hardware configuration
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localparam UART_PRESCALE = 32'd0;
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// Interrupt configuration
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localparam PLIC_NUM_SRC = 32'd53;
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localparam PLIC_NUM_SRC_LT_32 = (PLIC_NUM_SRC < 32);
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localparam PLIC_UART_ID = 32'd10;
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localparam PLIC_GPIO_ID = 32'd3;
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localparam PLIC_SPI_ID = 32'd6;
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localparam PLIC_SDC_ID = 32'd20;
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localparam BPRED_SUPPORTED = 1;
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localparam BPRED_TYPE = `BP_GSHARE; // BP_GSHARE_BASIC, BP_GLOBAL, BP_GLOBAL_BASIC, BP_TWOBIT
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localparam BPRED_SIZE = 32'd10;
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localparam BPRED_NUM_LHR = 32'd6;
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localparam BTB_SIZE = 32'd10;
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localparam RAS_SIZE = 32'd16;
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localparam INSTR_CLASS_PRED = 1;
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localparam SVADU_SUPPORTED = 1;
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localparam ZMMUL_SUPPORTED = 0;
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// FPU division architecture
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localparam RADIX = 32'h4;
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localparam DIVCOPIES = 32'h4;
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// bit manipulation
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localparam ZBA_SUPPORTED = 1;
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localparam ZBB_SUPPORTED = 1;
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localparam ZBC_SUPPORTED = 1;
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localparam ZBS_SUPPORTED = 1;
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// New compressed instructions
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localparam ZCB_SUPPORTED = 1;
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localparam ZCA_SUPPORTED = 0;
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localparam ZCF_SUPPORTED = 0;
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localparam ZCD_SUPPORTED = 0;
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// Memory synthesis configuration
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localparam USE_SRAM = 0;
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`include "config-shared.vh"
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@ -42,7 +42,7 @@ UNCORE_RAM_RANGE 64'h0FFFFFFF
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UNCORE_RAM_PRELOAD 1
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GPIO_LOOPBACK_TEST 0
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SPI_LOOPBACK_TEST 0
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UART_PRESCALE 0
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UART_PRESCALE 32'd0
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PLIC_NUM_SRC 32'd53
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# fpga is used for FPGA hardware. It adds the SDC and DDR (EXT_MEM)
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@ -119,26 +119,33 @@ MISA (32'h00000104 | 1 << 18 | 1 << 20)
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deriv div_2_1_rv32gc rv32gc
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RADIX 32'd2
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DIVCOPIES 32'd1
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IDIV_ON_FPU 0
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deriv div_2_2_rv32gc rv32gc
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RADIX 32'd2
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DIVCOPIES 32'd2
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IDIV_ON_FPU 0
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deriv div_2_4_rv32gc rv32gc
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RADIX 32'd2
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DIVCOPIES 32'd4
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IDIV_ON_FPU 0
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deriv div_4_1_rv32gc rv32gc
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RADIX 32'd4
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DIVCOPIES 32'd1
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IDIV_ON_FPU 0
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deriv div_4_2_rv32gc rv32gc
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RADIX 32'd4
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IDIV_ON_FPU 0
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DIVCOPIES 32'd2
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IDIV_ON_FPU 0
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deriv div_4_4_rv32gc rv32gc
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RADIX 32'd4
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DIVCOPIES 32'd4
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IDIV_ON_FPU 0
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deriv div_2_1i_rv32gc rv32gc div_2_1_rv32gc
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IDIV_ON_FPU 1
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@ -161,26 +168,32 @@ IDIV_ON_FPU 1
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deriv div_2_1_rv64gc rv64gc
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RADIX 32'd2
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DIVCOPIES 32'd1
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IDIV_ON_FPU 0
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deriv div_2_2_rv64gc rv64gc
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RADIX 32'd2
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DIVCOPIES 32'd2
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IDIV_ON_FPU 0
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deriv div_2_4_rv64gc rv64gc
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RADIX 32'd2
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DIVCOPIES 32'd4
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IDIV_ON_FPU 0
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deriv div_4_1_rv64gc rv64gc
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RADIX 32'd4
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DIVCOPIES 32'd1
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IDIV_ON_FPU 0
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deriv div_4_2_rv64gc rv64gc
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RADIX 32'd4
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DIVCOPIES 32'd2
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IDIV_ON_FPU 0
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deriv div_4_4_rv64gc rv64gc
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RADIX 32'd4
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DIVCOPIES 32'd4
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IDIV_ON_FPU 0
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deriv div_2_1i_rv64gc rv64gc div_2_1_rv64gc
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IDIV_ON_FPU 1
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@ -103,7 +103,7 @@ localparam RESBITS = DIVMINb + LOGR; // number of bits in a result: r intege
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localparam FPDUR = (RESBITS-1)/RK + 1 ; // ceiling((r+b)/rk)
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localparam DIVb = FPDUR*RK - LOGR; // divsqrt fractional bits, so total number of bits is a multiple of rk after r integer bits
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localparam DURLEN = $clog2(FPDUR); // enough bits to count the duration
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localparam DIVBLEN = $clog2(DIVb); // enough bits to count number of fractional bits
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localparam DIVBLEN = $clog2(DIVb+1); // enough bits to count number of fractional bits + 1 integer bit
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// largest length in IEU/FPU
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localparam CVTLEN = ((NF<XLEN) ? (XLEN) : (NF)); // max(XLEN, NF)
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@ -6,26 +6,43 @@ export PATH=$PATH:/usr/local/bin/
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verilator=`which verilator`
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basepath=$(dirname $0)/..
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RED='\033[0;31m'
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GREEN='\033[0;32m'
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NC='\033[0m' # No Color
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fails=0
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if [ "$1" == "-nightly" ]; then
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configs=(rv32e rv64gc rv32gc rv32imc rv32i rv64i) # fdqh_rv64gc
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derivconfigs=`ls $WALLY/config/deriv`
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for entry in $derivconfigs
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do
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if [[ $entry != *"syn_sram"* ]]; then # ignore syn_sram* configs that contain undefined module
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configs[${#configs[@]}]=$entry
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fi
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done
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else
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configs=(rv32e rv64gc rv32gc rv32imc rv32i rv64i fdqh_rv64gc)
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configs=(rv32e rv64gc rv32gc rv32imc rv32i rv64i div_2_1i_rv64gc fdqh_rv64gc)
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fi
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for config in ${configs[@]}; do
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echo "$config linting..."
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# echo "$config linting..."
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if !($verilator --no-timing --lint-only --top-module wallywrapper "-I$basepath/config/shared" "-I$basepath/config/$config" "-I$basepath/config/deriv/$config" $basepath/src/cvw.sv $basepath/testbench/wallywrapper.sv $basepath/src/*/*.sv $basepath/src/*/*/*.sv --relative-includes ); then
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echo "Exiting after $config lint due to errors or warnings"
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if [ "$1" == "-nightly" ]; then
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echo -e "${RED}$config failed lint${NC}"
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fails=$fails+1
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else
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echo -e "${RED}$config fails with lint errors or warnings"
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exit 1
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fi
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else
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echo -e "${GREEN}$config passed lint${NC}"
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fi
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done
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echo "All lints run with no errors or warnings"
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if ( $fails > 0 ); then
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echo -e "${RED}Linting failed for $fails configurations"
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exit 1
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fi
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echo -e "${GREEN}All lints run with no errors or warnings"
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# --lint-only just runs lint rather than trying to compile and simulate
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# -I points to the include directory where files such as `include config.vh are found
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