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https://github.com/openhwgroup/cvw
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Fixed a subtle questa sim bug with imperasDV. On some linux systems
vsim will default to 32-bit mode rather than 64-bit, but the ImperasDV libraries are 64-bit. vsim must run in 64-bit mode.
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parent
0ce4d1b452
commit
a1c6bc854e
3
.gitmodules
vendored
3
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@ -31,3 +31,6 @@
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[submodule "cvw-arch-verif"]
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[submodule "cvw-arch-verif"]
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path = addins/cvw-arch-verif
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path = addins/cvw-arch-verif
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url = https://github.com/openhwgroup/cvw-arch-verif
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url = https://github.com/openhwgroup/cvw-arch-verif
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[submodule "addins/riscvISACOV"]
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path = addins/riscvISACOV
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url = git@github.com:riscv-verification/riscvISACOV.git
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1
addins/riscvISACOV
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1
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@ -0,0 +1 @@
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Subproject commit ac9fa2d386c0cb2f44e1e1e83a555d585034dfa3
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3
bin/wsim
3
bin/wsim
@ -106,6 +106,9 @@ else:
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suffix = ""
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suffix = ""
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flags = suffix + " " + ImperasPlusArgs
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flags = suffix + " " + ImperasPlusArgs
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if((args.lockstep or args.fcov) and args.sim == "questa"):
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prefix = "MTI_VCO_MODE=64 " + prefix
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# other flags
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# other flags
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if (args.ccov):
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if (args.ccov):
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flags += " --ccov"
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flags += " --ccov"
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