mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-03 02:05:21 +00:00
script cleanup
This commit is contained in:
parent
338f37b570
commit
a1876b1e7c
2
bin/wsim
2
bin/wsim
@ -82,6 +82,6 @@ elif (args.sim == "vcs"):
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if (args.gui):
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if (args.gui):
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print("GUI option not available for VCS")
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print("GUI option not available for VCS")
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exit(1)
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exit(1)
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cmd = cd + "; ./run_vcs " + args.config + " " + args.testsuite
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cmd = cd + "; ./run_vcs " + args.config + " " + "\""+args.testsuite+"\""
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print(cmd)
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print(cmd)
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os.system(cmd)
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os.system(cmd)
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@ -27,6 +27,7 @@ clean() {
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# Clean and run simulation with VCS
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# Clean and run simulation with VCS
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clean
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clean
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#vcs +lint=all,noGCWM -simprofile -sverilog +vc -Mupdate -line -full64 -kdb -lca -debug_access+all+reverse -v2k_generate ${SOURCE_PATH} +define+TEST=$TESTSUITE $SIMFILES -o $OUTPUT -error=NOODV
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#vcs +lint=all,noGCWM -simprofile -sverilog +vc -Mupdate -line -full64 -kdb -lca -debug_access+all+reverse -v2k_generate ${SOURCE_PATH} +define+TEST=$TESTSUITE $SIMFILES -o $OUTPUT -error=NOODV
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vcs +lint=all,noGCWM -simprofile -sverilog +vc -Mupdate -line -full64 -kdb -lca -debug_access+all+reverse -v2k_generate ${SOURCE_PATH} -pvalue+testbench.TEST=$TESTSUITE $SIMFILES -o $OUTPUT -error=NOODV
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# lint ignores Unused Inputs (UI), Unnamed Assertipons (SVA-UA), Dynamic Type Sensitivty [IDTS]
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vcs +lint=all,noGCWM,noUI,noSVA-UA,noIDTS -simprofile -sverilog +vc -Mupdate -line -full64 -kdb -lca -debug_access+all+reverse -v2k_generate ${SOURCE_PATH} -pvalue+testbench.TEST=$TESTSUITE $SIMFILES -o $OUTPUT -error=NOODV
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./$OUTPUT | tee program.out
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./$OUTPUT | tee program.out
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@ -29,7 +29,6 @@
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module DCacheFlushFSM import cvw::*; #(parameter cvw_t P)
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module DCacheFlushFSM import cvw::*; #(parameter cvw_t P)
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(input logic clk,
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(input logic clk,
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input logic reset,
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input logic start,
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input logic start,
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output logic done);
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output logic done);
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@ -508,17 +508,17 @@ module testbench;
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// instantiate device to be tested
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// instantiate device to be tested
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assign GPIOIN = 0;
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assign GPIOIN = '0;
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assign UARTSin = 1;
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assign UARTSin = 1'b1;
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assign SPIIn = 0;
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assign SPIIn = 1'b0;
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if(P.EXT_MEM_SUPPORTED) begin
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if(P.EXT_MEM_SUPPORTED) begin
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ram_ahb #(.P(P), .BASE(P.EXT_MEM_BASE), .RANGE(P.EXT_MEM_RANGE))
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ram_ahb #(.P(P), .BASE(P.EXT_MEM_BASE), .RANGE(P.EXT_MEM_RANGE))
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ram (.HCLK, .HRESETn, .HADDR, .HWRITE, .HTRANS, .HWDATA, .HSELRam(HSELEXT),
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ram (.HCLK, .HRESETn, .HADDR, .HWRITE, .HTRANS, .HWDATA, .HSELRam(HSELEXT),
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.HREADRam(HRDATAEXT), .HREADYRam(HREADYEXT), .HRESPRam(HRESPEXT), .HREADY, .HWSTRB);
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.HREADRam(HRDATAEXT), .HREADYRam(HREADYEXT), .HRESPRam(HRESPEXT), .HREADY, .HWSTRB);
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end else begin
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end else begin
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assign HREADYEXT = 1;
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assign HREADYEXT = 1'b1;
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assign {HRESPEXT, HRDATAEXT} = 0;
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assign {HRESPEXT, HRDATAEXT} = '0;
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end
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end
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if(P.SDC_SUPPORTED) begin : sdcard
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if(P.SDC_SUPPORTED) begin : sdcard
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@ -534,9 +534,9 @@ module testbench;
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assign SDCDat = sd_dat_reg_t ? sd_dat_reg_o : sd_dat_i;
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assign SDCDat = sd_dat_reg_t ? sd_dat_reg_o : sd_dat_i;
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assign SDCDatIn = SDCDat;
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assign SDCDatIn = SDCDat;
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-----/\----- EXCLUDED -----/\----- */
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-----/\----- EXCLUDED -----/\----- */
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assign SDCIntr = 0;
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assign SDCIntr = 1'b0;
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end else begin
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end else begin
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assign SDCIntr = 0;
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assign SDCIntr = 1'b0;
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end
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end
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wallypipelinedsoc #(P) dut(.clk, .reset_ext, .reset, .HRDATAEXT, .HREADYEXT, .HRESPEXT, .HSELEXT, .HSELEXTSDC,
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wallypipelinedsoc #(P) dut(.clk, .reset_ext, .reset, .HRDATAEXT, .HREADYEXT, .HRESPEXT, .HSELEXT, .HSELEXTSDC,
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@ -621,7 +621,7 @@ module testbench;
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//assign DCacheFlushStart = TestComplete;
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//assign DCacheFlushStart = TestComplete;
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end
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end
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DCacheFlushFSM #(P) DCacheFlushFSM(.clk(clk), .reset(reset), .start(DCacheFlushStart), .done(DCacheFlushDone));
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DCacheFlushFSM #(P) DCacheFlushFSM(.clk, .start(DCacheFlushStart), .done(DCacheFlushDone));
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if(P.ZICSR_SUPPORTED) begin
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if(P.ZICSR_SUPPORTED) begin
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logic [P.XLEN-1:0] Minstret;
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logic [P.XLEN-1:0] Minstret;
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