Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Continued bmu cleanup

Browse Source
This commit is contained in:
David Harris 2024-05-22 00:48:04 -07:00
parent 88eb7bd045
commit a17204b0fe
2 changed files with 4 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/ieu/bmu/byteop.sv
View File

@ -30,22 +30,16 @@
module byteop #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, // Operands
input logic [1:0] ByteSelect, // LSB of Immediate
input logic ByteSelect, // LSB of Immediate
output logic [WIDTH-1:0] ByteResult); // rev8, orcb result
logic [WIDTH-1:0] OrcBResult, Rev8Result;
genvar i;
for (i=0;i<WIDTH;i+=8) begin:loop
for (i=0;i<WIDTH;i+=8) begin:byteloop
assign OrcBResult[i+7:i] = {8{|A[i+7:i]}};
assign Rev8Result[WIDTH-i-1:WIDTH-i-8] = A[i+7:i];
end
// ByteOp Result Mux
// mux3 #(WIDTH) byteresultmux(Rev8Result, Brev8Result, OrcBResult, ByteSelect, ByteResult);
always_comb begin
if (ByteSelect[0] == 1'b0) ByteResult = Rev8Result;
else /*if (ByteSelect[1] == 1'b0) */ ByteResult = OrcBResult;
end
mux2 #(WIDTH) byteresultmux(Rev8Result, OrcBResult, ByteSelect, ByteResult);
endmodule

2
src/ieu/bmu/zbb.sv
View File

@ -45,7 +45,7 @@ module zbb #(parameter WIDTH=32) (
mux2 #(1) ltmux(LT, LTU, BUnsigned , lt);
cnt #(WIDTH) cnt(.A, .RevA, .B(B[1:0]), .W64, .CntResult);
byteop #(WIDTH) bu(.A, .ByteSelect({B[10], B[0]}), .ByteResult);
byteop #(WIDTH) bu(.A, .ByteSelect(B[0]), .ByteResult);
ext #(WIDTH) ext(.A, .ExtSelect({~B[2], {B[2] & B[0]}}), .ExtResult);
// ZBBSelect[2] differentiates between min(u) vs max(u) instruction