Merge branch 'main' of https://github.com/openhwgroup/cvw

.gitignore

@@ -15,7 +15,7 @@ benchmarks/embench/wally*.json
 #vsim work files to ignore
 transcript
 vsim.wlf
-pipelined/wlft*
+wlft*
 wlft*
 /imperas-riscv-tests/FunctionRadix_32.addr
 /imperas-riscv-tests/FunctionRadix_64.addr
@@ -42,8 +42,8 @@ tests/linux-testgen/buildroot-image-output
 tests/linux-testgen/buildroot-config-src/main.config.old
 tests/linux-testgen/buildroot-config-src/linux.config.old
 tests/linux-testgen/buildroot-config-src/busybox.config.old
-pipelined/regression/slack-notifier/slack-webhook-url.txt
+sim/slack-notifier/slack-webhook-url.txt
-pipelined/regression/logs
+sim/logs
 fpga/generator/IP
 fpga/generator/vivado.*
 fpga/generator/.Xil/*
@@ -59,7 +59,7 @@ examples/C/sum/sum
 examples/C/fir/fir
 examples/fp/softfloat_demo/softfloat_demo
 examples/fp/fpcalc/fpcalc
-pipelined/src/fma/fma16_testgen
+src/fma/fma16_testgen
 linux/devicetree/debug/*
 !linux/devicetree/debug/dump-dts.sh
 linux/testvector-generation/genCheckpoint.gdb
@@ -79,29 +79,24 @@ synthDC/ppa/plots
 synthDC/wallyplots/
 synthDC/runArchive
 synthDC/hdl
-/pipelined/regression/power.saif
+sim/power.saif
 tests/fp/vectors/*.tv
 synthDC/Summary.csv
-pipelined/srt/exptestgen
+sim/wkdir
-pipelined/srt/testgen
-pipelined/srt/qslc_r4a2
-pipelined/srt/qslc_r4a2.sv
-pipelined/srt/testvectors
-pipelined/regression/wkdir
 tests/custom/work
 tests/custom/*/*/*.list
 tests/custom/*/*/*.elf
 tests/custom/*/*/*.map
 tests/custom/*/*/*.memfile
 tests/custom/crt0/*.a
-/pipelined/regression/sd_model.log
+sim/sd_model.log
 fpga/src/sdc/*
 fpga/src/sdc.tar.gz
 fpga/src/CopiedFiles_do_not_add_to_repo/*
-/pipelined/regression/branch.log
+sim/branch.log
 /fpga/generator/sim/imp-funcsim.v
 /fpga/generator/sim/imp-timesim.sdf
 /fpga/generator/sim/imp-timesim.v
 /fpga/generator/sim/syn-funcsim.v
 external
-pipelined/regression/results
+sim/results

Install

@@ -328,6 +328,6 @@ source ./setup.sh        # may require some modification for your system. Always
 
   cd <to location of repo clone>
   make
-  cd pipelined/regression
+  cd sim
   ./regression-wally       #(depends on having Questa installed)
 

Makefile

@@ -1,3 +1,7 @@
+# David_Harris@hmc.edu 2023
+# Top-level Makefile for CORE-V-Wally
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+
 all:
 	make install
 	make regression
@@ -15,8 +19,8 @@ install:
 	##ln -s ${RISCV}/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe tests/imperas-riscv-tests/riscv-ovpsim-plus/bin/Linux64/riscvOVPsimPlus.exe
 
 regression:
-	make -C pipelined/regression
+	make -C sim
 
 clean:
-	make clean -C pipelined/regression
+	make clean -C sim
 

README.md

@@ -53,7 +53,7 @@ Edit setup.sh and change the following lines to point to the path and license se
 
 Run a regression simulation with Questa to prove everything is installed.
 
-	$ cd pipelined/regression
+	$ cd sim
 	$ ./regression-wally       (depends on having Questa installed)
 
 # Toolchain Installation (Sys Admin)

benchmarks/coremark/Makefile

@@ -1,5 +1,6 @@
 # Wally Coremark Makefile
 # Daniel Torres & David Harris 28 July 2022
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
 PORT_DIR = $(CURDIR)/riscv64-baremetal
 cmbase=../../addins/coremark
@@ -21,8 +22,8 @@ PORT_CFLAGS = -g -mabi=$(ABI) -march=$(ARCH) -static -falign-functions=16 \
 all: $(work_dir)/coremark.bare.riscv.elf.memfile
 
 run:
-	(cd ../../pipelined/regression && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
+	(cd ../../sim && (time vsim -c -do "do wally-pipelined-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
-	cd ../../benchmarks/coremark/
+	cd ../benchmarks/coremark/
 #	KMG: added post processing script to give out branch miss proportion along with other stats to the coremark test
 	python3 coremark-postprocess.py
 

benchmarks/coremark/coremark-postprocess.py

@@ -9,17 +9,7 @@
 #
 # Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
 #
-# Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
-# files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
-# modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
-# is furnished to do so, subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-# OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
-# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
-# OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 ##################################################
 
 logFile = "../../benchmarks/coremark/work/coremark.sim.log"

benchmarks/embench/Makefile

@@ -34,7 +34,7 @@ sim: modelsim_build_memfile modelsim_run speed
 
 # launches modelsim to simulate tests on wally
 modelsim_run:
-	(cd ../../pipelined/regression/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench")
+	(cd ../../sim/ && vsim -c -do "do wally-pipelined-batch.do rv32gc embench")
 	cd ../../benchmarks/embench/
 
 # builds the objdump based on the compiled c elf files

benchmarks/graphGen.py

@@ -1,4 +1,7 @@
 #!/usr/bin/env python
+# Daniel Torres 2022
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+
 import subprocess
 import sys
 import json

bin/radixcopiesmultiregression.sh

@@ -1,4 +1,6 @@
 #!/bin/bash
+# Alessandro Maiuolo 2022
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
 configFile=config/shared/wally-shared.vh
 
@@ -10,39 +12,39 @@ currCopies="define DIVCOPIES 32'h1"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally
 
 currRadix="define RADIX 32'h2"
 currCopies="define DIVCOPIES 32'h2"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally
 
 currRadix="define RADIX 32'h2"
 currCopies="define DIVCOPIES 32'h4"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally
 
 currRadix="define RADIX 32'h4"
 currCopies="define DIVCOPIES 32'h1"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally
 
 currRadix="define RADIX 32'h4"
 currCopies="define DIVCOPIES 32'h2"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally
 
 currRadix="define RADIX 32'h4"
 currCopies="define DIVCOPIES 32'h4"
 sed -i "s/$searchRadix/$currRadix/" $configFile
 sed -i "s/$searchCopies/$currCopies/" $configFile
 echo regression on Radix :$currRadix: and Copies :$currCopies:
-./regression/regression-wally
+./sim/regression-wally

examples/C/fir/Makefile

@@ -5,7 +5,7 @@ $(TARGET).objdump: $(TARGET)
 	spike $(TARGET)
     
 $(TARGET): $(TARGET).c Makefile
-	riscv64-unknown-elf-gcc -o $(TARGET) -g -O2\
+	riscv64-unknown-elf-gcc -o $(TARGET) -g\
 	  -march=rv64gc -mabi=lp64d -mcmodel=medany \
 	  -nostdlib -static -lm -fno-tree-loop-distribute-patterns \
 	  -T../common/test.ld -I../common \

examples/C/lab1matrix/Makefile

@@ -1,33 +0,0 @@
-TARGET = matMult
-
-$(TARGET).objdump: $(TARGET)
-	riscv64-unknown-elf-objdump -S -D $(TARGET) > $(TARGET).objdump
-	spike $(TARGET)
-    
-$(TARGET): $(TARGET).c Makefile
-	riscv64-unknown-elf-gcc -o $(TARGET) -g -O\
-	  -march=rv64gc -mabi=lp64d -mcmodel=medany \
-	  -nostdlib -static -lm -fno-tree-loop-distribute-patterns \
-	  -T../common/test.ld -I../common \
-	  $(TARGET).c ../common/crt.S ../common/syscalls.c
-# Compiler flags:
-#  -o $(TARGET) defines the name of the output file
-#  -g generates debugging symbols for gdb
-#  -O turns on basic optimization; -O3 turns on heavy optimization; omit for no optimization
-#  -march=rv64gc -mabi=lp64d =mcmodel=medany generates code for RV64GC with doubles and long/ptrs = 64 bits
-#  -static forces static linking (no dynamic shared libraries on bare metal)
-#  -lm links the math library if necessary (when #include math.h)
-#  -nostdlib avoids inserting standard startup files and default libraries 
-#     because we are using crt.s on bare metal
-#  -fno-tree-loop-distribute-patterns turns replacing loops with memcpy/memset in the std library 
-#  -T specifies the linker file
-#  -I specifies the include path (e.g. for util.h)
-#  The last line defines the C files to compile.  
-#    crt.S is needed as our startup file to initialize the processor
-#    syscalls.c implements printf through the HTIF for Spike
-# other flags from riscv-tests makefiles that don't seem to be important
-#	  -ffast-math -DPREALLOCATE=1 -std=gnu99  \
-#     -fno-common -fno-builtin-printf -nostartfiles -lgcc \
-
-clean:
-	rm -f $(TARGET) $(TARGET).objdump

examples/C/lab1matrix/matMult.c

@@ -1,87 +0,0 @@
-// matMult.c
-// mmasserfrye@hmc.edu 30 January 2022
-
-#include <stdio.h>  // supports printf
-#include <math.h>   // supports fabs
-#include "util.h"   // supports verify
-
-// puts the indicated row of length n from matrix mat into array arr
-void getRow(int n, int row, double *mat, double *arr){
-    int ind;
-    for (int i=0; i<n; i++){
-        ind = i+row*n;
-        arr[i] = mat[ind];
-    }
-}
-
-// computes the dot product of arrays a and b of length n
-double dotproduct(int n, double a[], double b[]) {
-
-    volatile int i;
-    double sum;
-    sum = 0;
-
-    for (i=0; i<n; i++) {
-        if (i==0) sum=0;
-        sum += a[i]*b[i];
-    }
-    return sum;
-}
-
-// multiplies matrices A (m1 x n1m2) and B (n1m2 x n2) and puts the result in Y
-void mult(int m1, int n1m2, int n2, double *A, double *B, double *Y) {
-
-    // transpose B into Bt so we can dot product matching rows
-    double Bt[n2*n1m2];
-    int ind;
-    int indt;
-    for (int i=0; i<n1m2; i++){
-        for (int j=0; j<n2; j++){
-            ind = i*n2+j;
-            indt = j*n1m2+i;
-            Bt[indt] = B[ind];
-        }
-    }
-
-    int indY;
-    double Arow[n1m2];
-    double Bcol[n1m2];
-
-    for (int i=0; i<m1; i++){
-        for (int j=0; j<n2; j++){
-            indY = i*n2+j;
-            getRow(n1m2, i, A, Arow);
-            getRow(n1m2, j, Bt, Bcol);
-            Y[indY] = dotproduct(n1m2, Arow, Bcol);
-        }
-    }
-}
-
-int main(void) {
-
-    // change these bits to test stuff
-    int m = 20;
-    int n = 1;
-    double X[20]; // change to m*n
-    double Y[400]; // change to m^2
-
-    // fill in some numbers so the test feels legit
-    for (int i=0; i<n; i++){
-        X[i] = i;
-    }
- 
-    setStats(1);
-    mult(m, n, m, X, X, Y);
-    setStats(0);
-
-    /*
-    // use this code from Harris's fir.c to print matrix one element at a time
-    // library linked doesn't support printing doubles, so convert to integers to print
-    for (int i=0; i<m*m; i++)  {
-        int tmp = Y[i];
-        printf("Y[%d] = %d\n", i, tmp);
-    }
-    */
-    return 0;
-    
-}

fpga/README.md

@@ -16,7 +16,7 @@ a large number of debuging signals.
 
 * Programming the flash card
 You'll need to write the linux image to the flash card.  Use the convert2bin.py 
-script in pipelined/linux-testgen/linux-testvectors/ to convert the ram.txt
+script in linux-testgen/linux-testvectors/ [*** moved?] to convert the ram.txt 
 file from QEMU's preload to generate the binary.  Then to copy
  sudo dd if=ram.bin of=<path to flash card>.
 

fpga/generator/Makefile

@@ -27,7 +27,7 @@ SDC:
 
 PreProcessFiles:
 	rm -rf ../src/CopiedFiles_do_not_add_to_repo/
-	cp -r ../../pipelined/src/ ../src/CopiedFiles_do_not_add_to_repo/
+	cp -r ../../src/ ../src/CopiedFiles_do_not_add_to_repo/
 	./insert_debug_comment.sh
 
 $(dst)/%.log: %.tcl

fpga/generator/wally.tcl

@@ -19,7 +19,7 @@ read_verilog -sv [glob -type f ../src/CopiedFiles_do_not_add_to_repo/*/*.sv ../s
 read_verilog  {../src/fpgaTop.v}
 read_verilog -sv  [glob -type f ../src/sdc/*.sv]
 
-set_property include_dirs {../../pipelined/config/fpga ../../pipelined/config/shared} [current_fileset]
+set_property include_dirs {../../config/fpga ../../config/shared} [current_fileset]
 
 
 add_files -fileset constrs_1 -norecurse ../constraints/constraints-$boardSubName.xdc

setup.imperas.sh

@@ -31,7 +31,7 @@ export IMPERAS_PERSONALITY=CPUMAN_DV_ASYNC
 # setup QUESTA (Imperas only command, YMMV)
 svsetup -questa
 
-pushd pipelined/regression
+pushd sim
     # With IDV
     IMPERAS_TOOLS=$(pwd)/imperas.ic \
         OTHERFLAGS="+TRACE2LOG_ENABLE=1 VERBOSE=1" \

setup.sh

@@ -3,6 +3,7 @@
 # setup.sh
 # David_Harris@hmc.edu and kekim@hmc.edu 1 December 2021
 # Set up tools for rvw
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 
 echo "Executing Wally setup.sh"
 

sim/Makefile

@@ -2,27 +2,27 @@ all: riscoftests memfiles
 	# *** Build old tests/imperas-riscv-tests for now;
 	# Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test
 	# DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired
-	#make -C ../../tests/imperas-riscv-tests --jobs
+	#make -C ../tests/imperas-riscv-tests --jobs
-	#make -C ../../tests/imperas-riscv-tests XLEN=64 --jobs
+	#make -C ../tests/imperas-riscv-tests XLEN=64 --jobs
 	# Only compile Imperas tests if they are installed locally.  
 	# They are usually a symlink to $RISCV/imperas-riscv-tests and only 
 	# get compiled there manually during installation
-	#make -C ../../addins/imperas-riscv-tests
+	#make -C ../addins/imperas-riscv-tests
-	#make -C ../../addins/imperas-riscv-tests XLEN=64
+	#make -C ../addins/imperas-riscv-tests XLEN=64
-	#cd ../../addins/imperas-riscv-tests; elf2hex.sh
+	#cd ../addins/imperas-riscv-tests; elf2hex.sh
-	#cd ../../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump
+	#cd ../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump
 	# Link Linux test vectors 
-	#cd ../../tests/linux-testgen/linux-testvectors/;./tvLinker.sh
+	#cd ../tests/linux-testgen/linux-testvectors/;./tvLinker.sh
 
 allclean: clean all
 
 clean:
-	make clean -C ../../tests/riscof
+	make clean -C ../tests/riscof
 #   make clean -C ../../tests/wally-riscv-arch-test
 #	make allclean -C ../../tests/imperas-riscv-tests
 
 riscoftests: 
 # 	Builds riscv-arch-test 64 and 32-bit versions and builds wally-riscv-arch-test 64 and 32-bit versions
-	make -C ../../tests/riscof/ 
+	make -C ../tests/riscof/ 
 memfiles:
 	make -f makefile-memfile wally-sim-files --jobs

sim/make-tests.sh

@@ -13,4 +13,4 @@ make
 # exe2memfile.pl work/*/*/*.elf
 # cd ../linux-testgen/linux-testvectors
 # ./tvLinker.sh
-# cd ../../../pipelined/regression
+# cd ../../../regression

sim/makefile-memfile

@@ -1,4 +1,4 @@
-ROOT	:= ../..
+ROOT	:= ..
 SUFFIX	:= work
 ARCHDIR	:= $(ROOT)/tests/riscof
 WALLYDIR:= $(ROOT)/tests/wally-riscv-arch-test