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Merge pull request #437 from davidharrishmc/dev

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synth improvements
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Rose Thompson 2023-10-19 16:23:34 -05:00 committed by GitHub
commit 99671ebbcd
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 21 additions and 11 deletions
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6
src/cache/cacheLRU.sv vendored
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@ -70,8 +70,10 @@ module cacheLRU
// coverage off // coverage off
// Excluded from coverage b/c it is untestable without varying NUMWAYS. // Excluded from coverage b/c it is untestable without varying NUMWAYS.
function integer log2 (integer value); function integer log2 (integer value);
for (log2=0; value>0; log2=log2+1) int val;
value = value>>1; val = value;
for (log2 = 0; val > 0; log2 = log2+1)
val = val >> 1;
return log2; return log2;
endfunction // log2 endfunction // log2
// coverage on // coverage on

26
synthDC/scripts/synth.tcl
View File

@ -148,18 +148,22 @@ set all_in_ex_clk [remove_from_collection [all_inputs] [get_ports $my_clk]]
# Setting constraints on input ports # Setting constraints on input ports
if {$tech == "sky130"} { if {$tech == "sky130"} {
set_driving_cell -lib_cell sky130_osu_sc_12T_ms__dff_1 -pin Q $all_in_ex_clk if {$drive == "INV"} {
set_driving_cell -lib_cell inv -pin Y $all_in_ex_clk
} elseif {$drive == "FLOP"} {
set_driving_cell -lib_cell sky130_osu_sc_12T_ms__dff_1 -pin Q $all_in_ex_clk
}
} elseif {$tech == "sky90"} { } elseif {$tech == "sky90"} {
if {$drive == "INV"} { if {$drive == "INV"} {
set_driving_cell -lib_cell scc9gena_inv_1 -pin Y $all_in_ex_clk set_driving_cell -lib_cell scc9gena_inv_1 -pin Y $all_in_ex_clk
} elseif {$drive == "FLOP"} { } elseif {$drive == "FLOP"} {
set_driving_cell -lib_cell scc9gena_dfxbp_1 -pin Q $all_in_ex_clk set_driving_cell -lib_cell scc9gena_dfxbp_1 -pin Q $all_in_ex_clk
} }
} elseif {$tech == "tsmc28" || $tech=="tsmc28psyn"} { } elseif {$tech == "tsmc28" || $tech=="tsmc28psyn"} {
if {$drive == "INV"} { if {$drive == "INV"} {
set_driving_cell -lib_cell INVD1BWP30P140 -pin ZN $all_in_ex_clk set_driving_cell -lib_cell INVD1BWP30P140 -pin ZN $all_in_ex_clk
} elseif {$drive == "FLOP"} { } elseif {$drive == "FLOP"} {
set_driving_cell -lib_cell DFQD1BWP30P140 -pin Q $all_in_ex_clk set_driving_cell -lib_cell DFQD1BWP30P140 -pin Q $all_in_ex_clk
} }
} }
@ -174,16 +178,20 @@ if {$drive == "FLOP"} {
# Setting load constraint on output ports # Setting load constraint on output ports
if {$tech == "sky130"} { if {$tech == "sky130"} {
set_load [expr [load_of sky130_osu_sc_12T_ms_TT_1P8_25C.ccs/sky130_osu_sc_12T_ms__dff_1/D] * 1] [all_outputs]
} elseif {$tech == "sky90"} {
if {$drive == "INV"} { if {$drive == "INV"} {
set_load [expr [load_of scc9gena_tt_1.2v_25C/scc9gena_inv_4/A] * 1] [all_outputs] set_load [expr [load_of sky130_osu_sc_12T_ms_TT_1P8_25C.ccs/sky130_osu_sc_12T_ms__inv_4/A] * 1] [all_outputs]
} elseif {$drive == "FLOP"} {
set_load [expr [load_of sky130_osu_sc_12T_ms_TT_1P8_25C.ccs/sky130_osu_sc_12T_ms__dff_1/D] * 1] [all_outputs]
}
} elseif {$tech == "sky90"} {
if {$drive == "INV"} {
set_load [expr [load_of scc9gena_tt_1.2v_25C/scc9gena_inv_4/A] * 1] [all_outputs]
} elseif {$drive == "FLOP"} { } elseif {$drive == "FLOP"} {
set_load [expr [load_of scc9gena_tt_1.2v_25C/scc9gena_dfxbp_1/D] * 1] [all_outputs] set_load [expr [load_of scc9gena_tt_1.2v_25C/scc9gena_dfxbp_1/D] * 1] [all_outputs]
} }
} elseif {$tech == "tsmc28" || $tech == "tsmc28psyn"} { } elseif {$tech == "tsmc28" || $tech == "tsmc28psyn"} {
if {$drive == "INV"} { if {$drive == "INV"} {
set_load [expr [load_of tcbn28hpcplusbwp30p140tt0p9v25c/INVD4BWP30P140/I] * 1] [all_outputs] set_load [expr [load_of tcbn28hpcplusbwp30p140tt0p9v25c/INVD4BWP30P140/I] * 1] [all_outputs]
} elseif {$drive == "FLOP"} { } elseif {$drive == "FLOP"} {
set_load [expr [load_of tcbn28hpcplusbwp30p140tt0p9v25c/DFQD1BWP30P140/D] * 1] [all_outputs] set_load [expr [load_of tcbn28hpcplusbwp30p140tt0p9v25c/DFQD1BWP30P140/D] * 1] [all_outputs]
} }