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Updated Makefiles and source files to build the zsbl according to the config.

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This commit is contained in:
Rose Thompson 2024-09-02 14:03:47 -07:00
parent 2e55f1cecc
commit 9471ccd2fc
3 changed files with 20 additions and 12 deletions
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16
fpga/generator/Makefile
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@ -8,24 +8,30 @@ ArtyA7: export XILINX_PART := xc7a100tcsg324-1
ArtyA7: export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1 ArtyA7: export XILINX_BOARD := digilentinc.com:arty-a7-100:part0:1.1
ArtyA7: export board := ArtyA7 ArtyA7: export board := ArtyA7
ArtyA7: FPGA_Arty ArtyA7: FPGA_Arty
ArtyA7: CLOCK := 20000000 ArtyA7: SYSTEMCLOCK := 20000000
vcu118: export XILINX_PART := xcvu9p-flga2104-2L-e vcu118: export XILINX_PART := xcvu9p-flga2104-2L-e
vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4 vcu118: export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
vcu118: export board := vcu118 vcu118: export board := vcu118
vcu118: FPGA_VCU vcu118: FPGA_VCU
vcu118: CLOCK := 71000000 vcu118: SYSTEMCLOCK := 71000000
vcu108: export XILINX_PART := xcvu095-ffva2104-2-e vcu108: export XILINX_PART := xcvu095-ffva2104-2-e
vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7 vcu108: export XILINX_BOARD := xilinx.com:vcu108:part0:1.7
vcu108: export board := vcu108 vcu108: export board := vcu108
vcu108: FPGA_VCU vcu108: FPGA_VCU
vcu108: CLOCK := 50000000 vcu108: SYSTEMCLOCK := 50000000
# variables computed from config
EXT_MEM_BASE = $(shell grep 'EXT_MEM_BASE' ../../config/deriv/fpga$(board)/config.vh | sed 's/.*=.*h\([[:alnum:]]*\);/0x\1/g')
EXT_MEM_RANGE = $(shell grep 'EXT_MEM_RANGE' ../../config/deriv/fpga$(board)/config.vh | sed 's/.*=.*h\([[:alnum:]]*\);/\1/g' | sed 's/\(.*\)/base=16;\1+1/g' | bc | sed 's/\(.*\)/0x\1/g')
.PHONY: FPGA_Arty FPGA_VCU .PHONY: FPGA_Arty FPGA_VCU
FPGA_Arty: PreProcessFiles IP_Arty zsbl FPGA_Arty: PreProcessFiles IP_Arty zsbl
vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
FPGA_VCU: PreProcessFiles IP_VCU FPGA_VCU: PreProcessFiles IP_VCU zsbl
vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
# Generate IP Blocks # Generate IP Blocks
@ -66,7 +72,7 @@ PreProcessFiles:
# build the Zero stage boot loader (ZSBL) # build the Zero stage boot loader (ZSBL)
.PHONE: zsbl .PHONE: zsbl
zsbl: zsbl:
CLOCK = CLOCK $(MAKE) -C ../zsbl SYSTEMCLOCK = $(SYSTEMCLOCK) $(MAKE) EXT_MEM_BASE = $(EXT_MEM_BASE) EXT_MEM_RANGE = $(EXT_MEM_RANGE) -C ../zsbl
# Generate Individual IP Blocks # Generate Individual IP Blocks
$(dst)/%.log: %.tcl $(dst)/%.log: %.tcl

8
fpga/zsbl/Makefile
View File

@ -28,15 +28,15 @@ LINK_FLAGS :=$(MARCH) $(MABI) -nostartfiles -L $(RISCV)/riscv64-unknown-elf
LINKER :=linker1000.x LINKER :=linker1000.x
# FGPA parameters # FGPA parameters
CLOCK ?= 20000000 SYSTEMCLOCK ?= 20000000
MEMSTART ?= 0x80000000 EXT_MEM_BASE ?= 0x80000000
MEMSIZE ?= 0x10000000 EXT_MEM_RANGE ?= 0x10000000
AFLAGS =$(MARCH) $(MABI) -W AFLAGS =$(MARCH) $(MABI) -W
# Override directive allows us to prepend other options on the command line # Override directive allows us to prepend other options on the command line
# e.g. $ make CFLAGS=-g # e.g. $ make CFLAGS=-g
override CFLAGS +=$(MARCH) $(MABI) -mcmodel=medany -O2 -g -DSYSTEMCLOCK=${CLOCK} -DMEMSTART=${MEMSTART} -DMEMSIZE=${MEMSIZE} override CFLAGS +=$(MARCH) $(MABI) -mcmodel=medany -O2 -g -DSYSTEMCLOCK=${SYSTEMCLOCK} -DEXT_MEM_BASE=${EXT_MEM_BASE} -DEXT_MEM_RANGE=${EXT_MEM_RANGE}
AS=riscv64-unknown-elf-as AS=riscv64-unknown-elf-as
CC=riscv64-unknown-elf-gcc CC=riscv64-unknown-elf-gcc
AR=riscv64-unknown-elf-ar AR=riscv64-unknown-elf-ar

8
fpga/zsbl/boot.h
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@ -45,8 +45,10 @@ typedef QWORD LBA_t;
// These locations are copied from the generic configuration // These locations are copied from the generic configuration
// of OpenSBI. These addresses can be found in: // of OpenSBI. These addresses can be found in:
// buildroot/output/build/opensbi-0.9/platform/generic/config.mk // buildroot/output/build/opensbi-0.9/platform/generic/config.mk
#define FDT_ADDRESS 0xFF000000 // FW_JUMP_FDT_ADDR
#define OPENSBI_ADDRESS 0x80000000 // FW_TEXT_START // FDT_ADDRESS now defined in system.h
//#define FDT_ADDRESS 0xFF000000 // FW_JUMP_FDT_ADDR
#define OPENSBI_ADDRESS EXT_MEM_BASE // FW_TEXT_START
#define KERNEL_ADDRESS 0x80200000 // FW_JUMP_ADDR #define KERNEL_ADDRESS 0x80200000 // FW_JUMP_ADDR
#define BANNER " █▀█ █▀█ █▀█ █▀▀ █ █\r\n" \ #define BANNER " █▀█ █▀█ █▀█ █▀▀ █ █\r\n" \
@ -62,8 +64,8 @@ typedef QWORD LBA_t;
// Export disk_read // Export disk_read
int disk_read(BYTE * buf, LBA_t sector, UINT count); int disk_read(BYTE * buf, LBA_t sector, UINT count);
// now defined in system.h
//#define SYSTEMCLOCK 50000000 //#define SYSTEMCLOCK 50000000
// *** fix me: now defined in system.h
// TODO: This line needs to change back to 20MHz when we fix the // TODO: This line needs to change back to 20MHz when we fix the
// timing problems. // timing problems.