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https://github.com/openhwgroup/cvw
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Merge branch 'verilator_getenv' into wsim_verilator
This commit is contained in:
commit
7b5972ea82
@ -30,17 +30,21 @@ obj_dir_non_profiling/Vtestbench_$(WALLYCONF): $(SOURCE)
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mkdir -p obj_dir_non_profiling
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mkdir -p obj_dir_non_profiling
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time verilator \
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time verilator \
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--Mdir obj_dir_non_profiling -o Vtestbench_$(WALLYCONF) \
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--Mdir obj_dir_non_profiling -o Vtestbench_$(WALLYCONF) \
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-cc --binary \
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$(OPT) $(PARAMS) $(NONPROF) \
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$(OPT) $(PARAMS) $(NONPROF) \
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--timescale "1ns/1ns" --timing --binary --top-module testbench --relative-includes \
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--timescale "1ns/1ns" --timing --top-module testbench --relative-includes \
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"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" \
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"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" \
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wrapper.c \
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${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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obj_dir_profiling/Vtestbench_$(WALLYCONF): $(SOURCE)
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obj_dir_profiling/Vtestbench_$(WALLYCONF): $(SOURCE)
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mkdir -p obj_dir_profiling
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mkdir -p obj_dir_profiling
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time verilator \
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time verilator \
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--Mdir obj_dir_profiling -o Vtestbench_$(WALLYCONF) \
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--Mdir obj_dir_profiling -o Vtestbench_$(WALLYCONF) \
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-cc --binary \
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--prof-cfuncs $(OPT) $(PARAMS) \
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--prof-cfuncs $(OPT) $(PARAMS) \
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--timescale "1ns/1ns" --timing --binary --top-module testbench --relative-includes \
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--timescale "1ns/1ns" --timing --top-module testbench --relative-includes \
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wrapper.c \
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"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" ${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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"-I${WALLY}/config/shared" "-I${WALLY}/config/$(WALLYCONF)" ${WALLY}/src/cvw.sv ${WALLY}/testbench/testbench.sv ${WALLY}/testbench/common/*.sv ${WALLY}/src/*/*.sv ${WALLY}/src/*/*/*.sv
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questa:
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questa:
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7
sim/verilator/wrapper.c
Normal file
7
sim/verilator/wrapper.c
Normal file
@ -0,0 +1,7 @@
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#include <stdlib.h>
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#include "Vtestbench__Dpi.h"
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const char *getenvval(const char *pszName) {
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return ((const char *) getenv(pszName));
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}
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@ -34,7 +34,11 @@
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`endif
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`endif
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import cvw::*;
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import cvw::*;
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`ifdef VERILATOR
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import "DPI-C" function string getenvval(input string env_name);
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`else
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import "DPI-C" function string getenv(input string env_name);
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import "DPI-C" function string getenv(input string env_name);
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`endif
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module testbench;
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module testbench;
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/* verilator lint_off WIDTHTRUNC */
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/* verilator lint_off WIDTHTRUNC */
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@ -60,7 +64,12 @@ module testbench;
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// Variables that can be overwritten with $value$plusargs at start of simulation
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// Variables that can be overwritten with $value$plusargs at start of simulation
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string TEST;
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string TEST;
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integer INSTR_LIMIT;
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integer INSTR_LIMIT;
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`ifdef VERILATOR
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string RISCV_DIR = getenvval("RISCV"); // "/opt/riscv";
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`else
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string RISCV_DIR = getenv("RISCV"); // "/opt/riscv";
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string RISCV_DIR = getenv("RISCV"); // "/opt/riscv";
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`endif
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// string RISCV_DIR = "/opt/riscv";
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// DUT signals
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// DUT signals
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logic [P.AHBW-1:0] HRDATAEXT;
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logic [P.AHBW-1:0] HRDATAEXT;
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