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https://github.com/openhwgroup/cvw
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Modified IROM to return the correct offset when unaligned.
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@ -41,12 +41,19 @@ module irom(
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logic [`XLEN-1:0] ReadDataFull;
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rom1p1r #(ADDR_WDITH, `XLEN) rom(.clk, .ce, .addr(Adr[ADDR_WDITH+OFFSET-1:OFFSET]), .dout(ReadDataFull));
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if (`XLEN == 32) assign ReadData = ReadDataFull;
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if (`XLEN == 32) begin
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logic AdrD;
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flopen #(1) AdrReg(clk, ce, Adr[1], AdrD);
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assign ReadData = AdrD ? {16'b0, ReadDataFull[31:16]} : ReadDataFull;
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end
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// have to delay Ardr[OFFSET-1] by 1 cycle
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else begin
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logic AdrD;
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flopen #(1) AdrReg(clk, ce, Adr[OFFSET-1], AdrD);
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assign ReadData = AdrD ? ReadDataFull[63:32] : ReadDataFull[31:0];
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logic [OFFSET-2:0] AdrD;
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flopen #(OFFSET-1) AdrReg(clk, ce, Adr[OFFSET-1:1], AdrD);
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assign ReadData = AdrD == 2'b11 ? {16'b0, ReadDataFull[63:48]} :
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AdrD == 2'b10 ? ReadDataFull[63:32] :
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AdrD == 2'b01 ? ReadDataFull[47:16] :
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ReadDataFull[31:0];
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end
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endmodule
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@ -92,7 +92,7 @@ module spillsupport #(parameter CACHE_ENABLED)
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flopenr #(16) SpillInstrReg(.clk(clk),
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.en(SpillSaveF & ~Flush),
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.reset(reset),
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.d(SavedInstr),
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.d(InstrRawF[15:0]),
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.q(SpillDataLine0));
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mux2 #(32) postspillmux(.d0(InstrRawF), .d1({InstrRawF[15:0], SpillDataLine0}), .s(SpillF),
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