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Fixed csr typos
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96477a4879
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@ -294,18 +294,12 @@ module csr import cvw::*; #(parameter cvw_t P) (
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assign ENVCFG_PBMTE = MENVCFG_REGW[62]; // page-based memory types enable
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assign ENVCFG_PBMTE = MENVCFG_REGW[62]; // page-based memory types enable
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assign ENVCFG_CBE = (PrivilegeModeW == P.M_MODE) ? 4'b1111 :
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assign ENVCFG_CBE = (PrivilegeModeW == P.M_MODE) ? 4'b1111 :
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(PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[7:4] :
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(PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[7:4] :
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(MSENVCFG_REGW[7:4] & SENVCFG_REGW[7:4]);
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(MENVCFG_REGW[7:4] & SENVCFG_REGW[7:4]);
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// FIOM presently doesn't do anything because Wally fences don't do anything
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// FIOM presently doesn't do anything because Wally fences don't do anything
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assign ENVCFG_FIOM = (PrivilegeModeW == P.M_MODE) ? 1'b1 :
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assign ENVCFG_FIOM = (PrivilegeModeW == P.M_MODE) ? 1'b1 :
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(PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[0] :
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(PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[0] :
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(MENVCFG_REGW[0] & SENVCFG_REGW[0]);
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(MENVCFG_REGW[0] & SENVCFG_REGW[0]);
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if (((priv_mode != M) && (menvcfg.CBIE == 00)) ||
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((priv_mode == U) && (senvcfg.CBIE == 00)))
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{
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<raise illegal instruction exception>
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}
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// merge CSR Reads
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// merge CSR Reads
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assign CSRReadValM = CSRUReadValM | CSRSReadValM | CSRMReadValM | CSRCReadValM;
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assign CSRReadValM = CSRUReadValM | CSRSReadValM | CSRMReadValM | CSRCReadValM;
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flopenrc #(P.XLEN) CSRValWReg(clk, reset, FlushW, ~StallW, CSRReadValM, CSRReadValW);
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flopenrc #(P.XLEN) CSRValWReg(clk, reset, FlushW, ~StallW, CSRReadValM, CSRReadValW);
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