From 6a88ac28e48173bbe5e5c1ffe8bd4763346ffbbb Mon Sep 17 00:00:00 2001 From: David Harris Date: Sun, 2 Jul 2023 02:01:40 -0700 Subject: [PATCH] Fixed csr typos --- src/privileged/csr.sv | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/privileged/csr.sv b/src/privileged/csr.sv index c9cc88f3c..ccca40a00 100644 --- a/src/privileged/csr.sv +++ b/src/privileged/csr.sv @@ -294,18 +294,12 @@ module csr import cvw::*; #(parameter cvw_t P) ( assign ENVCFG_PBMTE = MENVCFG_REGW[62]; // page-based memory types enable assign ENVCFG_CBE = (PrivilegeModeW == P.M_MODE) ? 4'b1111 : (PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[7:4] : - (MSENVCFG_REGW[7:4] & SENVCFG_REGW[7:4]); + (MENVCFG_REGW[7:4] & SENVCFG_REGW[7:4]); // FIOM presently doesn't do anything because Wally fences don't do anything assign ENVCFG_FIOM = (PrivilegeModeW == P.M_MODE) ? 1'b1 : (PrivilegeModeW == P.S_MODE | !P.S_SUPPORTED) ? MENVCFG_REGW[0] : (MENVCFG_REGW[0] & SENVCFG_REGW[0]); -if (((priv_mode != M) && (menvcfg.CBIE == 00)) || - ((priv_mode == U) && (senvcfg.CBIE == 00))) - { - - } - // merge CSR Reads assign CSRReadValM = CSRUReadValM | CSRSReadValM | CSRMReadValM | CSRCReadValM; flopenrc #(P.XLEN) CSRValWReg(clk, reset, FlushW, ~StallW, CSRReadValM, CSRReadValW);