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Conditionally instantiate hardware in ifu

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This commit is contained in:
David Harris 2023-10-30 20:55:00 -07:00
parent afabc52b61
commit 680fb3f30b
2 changed files with 6 additions and 3 deletions
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1
.gitignore vendored
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@ -83,7 +83,6 @@ synthDC/ppa/plots
synthDC/wallyplots/
synthDC/runArchive
synthDC/hdl
synthDC/wrappers
sim/power.saif
tests/fp/vectors/*.tv
synthDC/Summary.csv

8
src/ifu/ifu.sv
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@ -389,13 +389,17 @@ module ifu import cvw::*; #(parameter cvw_t P) (
assign BranchMisalignedFaultE = (IEUAdrE[1] & ~P.COMPRESSED_SUPPORTED) & PCSrcE;
flopenr #(1) InstrMisalignedReg(clk, reset, ~StallM, BranchMisalignedFaultE, InstrMisalignedFaultM);
// Instruction and PC/PCLink pipeline registers
// Instruction and PC pipeline registers
// Cannot use flopenrc for Instr(E/M) as it resets to NOP not 0.
mux2 #(32) FlushInstrEMux(InstrD, nop, FlushE, NextInstrD);
mux2 #(32) FlushInstrMMux(InstrE, nop, FlushM, NextInstrE);
flopenr #(32) InstrEReg(clk, reset, ~StallE, NextInstrD, InstrE);
flopenr #(32) InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM);
flopenr #(P.XLEN) PCEReg(clk, reset, ~StallE, PCD, PCE);
// InstrM is only needed with CSRs or atomic operations
if (P.ZICSR_SUPPORTED | P.A_SUPPORTED)
flopenr #(32) InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM);
else assign InstrM = 0;
// PCM is only needed with CSRs or branch prediction
if (P.ZICSR_SUPPORTED | P.BPRED_SUPPORTED)
flopenr #(P.XLEN) PCMReg(clk, reset, ~StallM, PCE, PCM);