diff --git a/.gitignore b/.gitignore
index b4223b50e..2b767197b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -83,7 +83,6 @@ synthDC/ppa/plots
 synthDC/wallyplots/
 synthDC/runArchive
 synthDC/hdl
-synthDC/wrappers
 sim/power.saif
 tests/fp/vectors/*.tv
 synthDC/Summary.csv
diff --git a/src/ifu/ifu.sv b/src/ifu/ifu.sv
index 53fed0cd8..325153ac5 100644
--- a/src/ifu/ifu.sv
+++ b/src/ifu/ifu.sv
@@ -389,13 +389,17 @@ module ifu import cvw::*;  #(parameter cvw_t P) (
   assign BranchMisalignedFaultE = (IEUAdrE[1] & ~P.COMPRESSED_SUPPORTED) & PCSrcE;
   flopenr #(1) InstrMisalignedReg(clk, reset, ~StallM, BranchMisalignedFaultE, InstrMisalignedFaultM);
 
-  // Instruction and PC/PCLink pipeline registers
+  // Instruction and PC pipeline registers
   // Cannot use flopenrc for Instr(E/M) as it resets to NOP not 0.
   mux2    #(32)     FlushInstrEMux(InstrD, nop, FlushE, NextInstrD);
   mux2    #(32)     FlushInstrMMux(InstrE, nop, FlushM, NextInstrE);
   flopenr #(32)     InstrEReg(clk, reset, ~StallE, NextInstrD, InstrE);
-  flopenr #(32)     InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM);
   flopenr #(P.XLEN) PCEReg(clk, reset, ~StallE, PCD, PCE);
+
+  // InstrM is only needed with CSRs or atomic operations
+  if (P.ZICSR_SUPPORTED | P.A_SUPPORTED)
+    flopenr #(32)     InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM);
+  else assign InstrM = 0;
   // PCM is only needed with CSRs or branch prediction
   if (P.ZICSR_SUPPORTED | P.BPRED_SUPPORTED) 
     flopenr #(P.XLEN) PCMReg(clk, reset, ~StallM, PCE, PCM);