Added fulladder example files

examples/verilog/fulladder/fulladder-batch.do

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+# fulladder-batch.do 
+# David_Harris@hmc.edu 10 January 2021
+vlog fulladder.sv 
+vopt +acc work.testbench -o workopt 
+vsim workopt
+run -all
+quit

examples/verilog/fulladder/fulladder.do

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+# fulladder.do 
+# David_Harris@hmc.edu 10 January 2021
+
+# compile, optimize, and start the simulation
+vlog fulladder.sv 
+vopt +acc work.testbench -o workopt 
+vsim workopt
+
+# Add waveforms and run the simulation
+add wave *
+run -all
+view wave

examples/verilog/fulladder/sim-fulladder-batch

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+vsim -c -do fulladder-batch.do