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Changes to Tracer for VM covergae

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Huda-10xe 2024-12-05 00:04:58 -08:00
commit 617434ac32
1 changed files with 11 additions and 9 deletions
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20
testbench/common/wallyTracer.sv
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@ -44,6 +44,7 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
logic [31:0] InstrRawD, InstrRawE, InstrRawM, InstrRawW; logic [31:0] InstrRawD, InstrRawE, InstrRawM, InstrRawW;
logic InstrValidM, InstrValidW; logic InstrValidM, InstrValidW;
logic StallE, StallM, StallW; logic StallE, StallM, StallW;
logic GatedStallW;
logic FlushD, FlushE, FlushM, FlushW; logic FlushD, FlushE, FlushM, FlushW;
logic TrapM, TrapW; logic TrapM, TrapW;
logic HaltM, HaltW; logic HaltM, HaltW;
@ -90,6 +91,7 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
assign StallE = testbench.dut.core.StallE; assign StallE = testbench.dut.core.StallE;
assign StallM = testbench.dut.core.StallM; assign StallM = testbench.dut.core.StallM;
assign StallW = testbench.dut.core.StallW; assign StallW = testbench.dut.core.StallW;
assign GatedStallW = testbench.dut.core.lsu.GatedStallW;
assign FlushD = testbench.dut.core.FlushD; assign FlushD = testbench.dut.core.FlushD;
assign FlushE = testbench.dut.core.FlushE; assign FlushE = testbench.dut.core.FlushE;
assign FlushM = testbench.dut.core.FlushM; assign FlushM = testbench.dut.core.FlushM;
@ -362,16 +364,16 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
flopenrc #(P.XLEN) VAdrDWReg (clk, reset, FlushW, ~StallW, VAdrDM, VAdrDW); flopenrc #(P.XLEN) VAdrDWReg (clk, reset, FlushW, ~StallW, VAdrDM, VAdrDW);
flopenrc #(P.PA_BITS) PAIWReg (clk, reset, FlushW, ~StallW, PAIM, PAIW); flopenrc #(P.PA_BITS) PAIWReg (clk, reset, FlushW, ~StallW, PAIM, PAIW);
flopenrc #(P.PA_BITS) PADWReg (clk, reset, FlushW, ~StallW, PADM, PADW); flopenrc #(P.PA_BITS) PADWReg (clk, reset, FlushW, ~StallW, PADM, PADW);
flopenrc #(P.XLEN) PTE_iWReg (clk, reset, FlushW, ~StallW, PTE_iM, PTE_iW); flopenrc #(P.XLEN) PTE_iWReg (clk, reset, FlushW, ~GatedStallW, PTE_iM, PTE_iW);
flopenrc #(P.XLEN) PTE_dWReg (clk, reset, FlushW, ~StallW, PTE_dM, PTE_dW); flopenrc #(P.XLEN) PTE_dWReg (clk, reset, FlushW, ~GatedStallW, PTE_dM, PTE_dW);
flopenrc #(P.PPN_BITS) PPN_iWReg (clk, reset, FlushW, ~StallW, PPN_iM, PPN_iW); flopenrc #(2) PageType_iWReg (clk, reset, FlushW, ~GatedStallW, PageType_iM, PageType_iW);
flopenrc #(P.PPN_BITS) PPN_dWReg (clk, reset, FlushW, ~StallW, PPN_dM, PPN_dW); flopenrc #(2) PageType_dWReg (clk, reset, FlushW, ~GatedStallW, PageType_dM, PageType_dW);
flopenrc #(2) PageType_iWReg (clk, reset, FlushW, ~StallW, PageType_iM, PageType_iW); flopenrc #(P.PPN_BITS) PPN_iWReg (clk, reset, FlushW, ~GatedStallW, PPN_iM, PPN_iW);
flopenrc #(2) PageType_dWReg (clk, reset, FlushW, ~StallW, PageType_dM, PageType_dW); flopenrc #(P.PPN_BITS) PPN_dWReg (clk, reset, FlushW, ~GatedStallW, PPN_dM, PPN_dW);
flopenrc #(1) ReadAccessWReg (clk, reset, FlushW, ~StallW, ReadAccessM, ReadAccessW); flopenrc #(1) ReadAccessWReg (clk, reset, FlushW, ~GatedStallW, ReadAccessM, ReadAccessW);
flopenrc #(1) WriteAccessWReg (clk, reset, FlushW, ~StallW, WriteAccessM, WriteAccessW); flopenrc #(1) WriteAccessWReg (clk, reset, FlushW, ~GatedStallW, WriteAccessM, WriteAccessW);
// *** what is this used for? // *** what is this used for?
flopenrc #(1) ExecuteAccessDReg (clk, reset, FlushE, ~StallE, ExecuteAccessF, ExecuteAccessD); flopenrc #(1) ExecuteAccessDReg (clk, reset, FlushE, ~StallD, ExecuteAccessF, ExecuteAccessD);
flopenrc #(1) ExecuteAccessEReg (clk, reset, FlushE, ~StallE, ExecuteAccessD, ExecuteAccessE); flopenrc #(1) ExecuteAccessEReg (clk, reset, FlushE, ~StallE, ExecuteAccessD, ExecuteAccessE);
flopenrc #(1) ExecuteAccessMReg (clk, reset, FlushM, ~StallM, ExecuteAccessE, ExecuteAccessM); flopenrc #(1) ExecuteAccessMReg (clk, reset, FlushM, ~StallM, ExecuteAccessE, ExecuteAccessM);
flopenrc #(1) ExecuteAccessWReg (clk, reset, FlushW, ~StallW, ExecuteAccessM, ExecuteAccessW); flopenrc #(1) ExecuteAccessWReg (clk, reset, FlushW, ~StallW, ExecuteAccessM, ExecuteAccessW);