Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Getting much closer to a working version.

Browse Source
This commit is contained in:
Ross Thompson 2024-06-17 12:37:10 -07:00
parent cccb40e4b5
commit 598770da51
2 changed files with 30 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
fpga/rvvidaemon/Makefile
View File

@ -1,10 +1,10 @@
all: rvvidaemon all: rvvidaemon
rvvidaemon: rvvidaemon.o rvvidaemon: rvvidaemon.o
gcc $^ /opt/riscv/ImperasDV-OpenHW/Imperas/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so -o rvvidaemon gcc $^ /opt/riscv/ImperasDV-OpenHW/Imperas/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so -o rvvidaemon
%.o:%.c %.o:%.c
gcc -c $^ -o $@ gcc -I/opt/riscv/ImperasDV-OpenHW/Imperas/ImpProprietary/include/host -c $^ -o $@
clean: clean:
rm *.o rvvidaemon rm *.o rvvidaemon

28
fpga/rvvidaemon/rvvidaemon.c
View File

@ -95,6 +95,9 @@ typedef struct {
void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData); void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData);
void BitShiftArray(uint8_t *dst, uint8_t *src, uint8_t ShiftAmount, int Length); void BitShiftArray(uint8_t *dst, uint8_t *src, uint8_t ShiftAmount, int Length);
void PrintInstructionData(RequiredRVVI_t *InstructionData); void PrintInstructionData(RequiredRVVI_t *InstructionData);
void ProcessRvviAll(RequiredRVVI_t *InstructionData);
void set_gpr(int hart, int reg, uint64_t value);
void set_fpr(int hart, int reg, uint64_t value);
int main(int argc, char **argv){ int main(int argc, char **argv){
@ -207,6 +210,9 @@ int main(int argc, char **argv){
uint32_t insn; uint32_t insn;
RequiredRVVI_t InstructionData; RequiredRVVI_t InstructionData;
DecodeRVVI(buf + headerbytes, payloadbytes, &InstructionData); DecodeRVVI(buf + headerbytes, payloadbytes, &InstructionData);
// now let's drive IDV
// start simple just drive and compare PC.
ProcessRvviAll(&InstructionData);
PrintInstructionData(&InstructionData); PrintInstructionData(&InstructionData);
} }
} }
@ -218,6 +224,28 @@ int main(int argc, char **argv){
return 0; return 0;
} }
void ProcessRvviAll(RequiredRVVI_t *InstructionData){
long int found;
uint64_t time = InstructionData->Mcycle;
uint8_t trap = InstructionData->Trap;
uint64_t order = InstructionData->Minstret;
if(InstructionData->GPREn) set_gpr(0, InstructionData->GPRReg, InstructionData->GPRValue);
if(InstructionData->FPREn) set_fpr(0, InstructionData->FPRReg, InstructionData->FPRValue);
// *** set is for nets like interrupts come back to this.
//found = rvviRefNetIndexGet("pc_rdata");
//rvviRefNetSet(found, InstructionData->PC, time);
}
void set_gpr(int hart, int reg, uint64_t value){
rvviDutGprSet(hart, reg, value);
}
void set_fpr(int hart, int reg, uint64_t value){
rvviDutFprSet(hart, reg, value);
}
void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData){ void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData){
// you know this actually easiser in assembly. :( // you know this actually easiser in assembly. :(
uint8_t buf2[BUF_SIZ], buf3[BUF_SIZ]; uint8_t buf2[BUF_SIZ], buf3[BUF_SIZ];