From 598770da518509f56131cb9f3141125777b26125 Mon Sep 17 00:00:00 2001
From: Ross Thompson <ross1728@gmail.com>
Date: Mon, 17 Jun 2024 12:37:10 -0700
Subject: [PATCH] Getting much closer to a working version.

---
 fpga/rvvidaemon/Makefile     |  4 ++--
 fpga/rvvidaemon/rvvidaemon.c | 28 ++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/fpga/rvvidaemon/Makefile b/fpga/rvvidaemon/Makefile
index d529a1212..4f048302d 100644
--- a/fpga/rvvidaemon/Makefile
+++ b/fpga/rvvidaemon/Makefile
@@ -1,10 +1,10 @@
 all: rvvidaemon
 
 rvvidaemon: rvvidaemon.o
-	gcc $^ /opt/riscv/ImperasDV-OpenHW/Imperas/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so -o rvvidaemon
+	gcc $^ /opt/riscv/ImperasDV-OpenHW/Imperas/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model.so  -o rvvidaemon
 
 %.o:%.c
-	gcc -c $^ -o $@
+	gcc -I/opt/riscv/ImperasDV-OpenHW/Imperas/ImpProprietary/include/host -c $^ -o $@
 
 clean:
 	rm *.o rvvidaemon
diff --git a/fpga/rvvidaemon/rvvidaemon.c b/fpga/rvvidaemon/rvvidaemon.c
index 7a33a00b5..bf875c771 100644
--- a/fpga/rvvidaemon/rvvidaemon.c
+++ b/fpga/rvvidaemon/rvvidaemon.c
@@ -95,6 +95,9 @@ typedef struct {
 void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData);
 void BitShiftArray(uint8_t *dst, uint8_t *src, uint8_t ShiftAmount, int Length);
 void PrintInstructionData(RequiredRVVI_t *InstructionData);
+void ProcessRvviAll(RequiredRVVI_t *InstructionData);
+void set_gpr(int hart, int reg, uint64_t value);
+void set_fpr(int hart, int reg, uint64_t value);
 
 int main(int argc, char **argv){
   
@@ -207,6 +210,9 @@ int main(int argc, char **argv){
       uint32_t insn;
       RequiredRVVI_t InstructionData;
       DecodeRVVI(buf + headerbytes, payloadbytes, &InstructionData);
+      // now let's drive IDV
+      // start simple just drive and compare PC.
+      ProcessRvviAll(&InstructionData);
       PrintInstructionData(&InstructionData);
     }
   }
@@ -218,6 +224,28 @@ int main(int argc, char **argv){
   return 0;
 }
 
+void ProcessRvviAll(RequiredRVVI_t *InstructionData){
+  long int found;
+  uint64_t time = InstructionData->Mcycle;
+  uint8_t trap = InstructionData->Trap;
+  uint64_t order = InstructionData->Minstret;
+
+  if(InstructionData->GPREn) set_gpr(0, InstructionData->GPRReg, InstructionData->GPRValue);
+  if(InstructionData->FPREn) set_fpr(0, InstructionData->FPRReg, InstructionData->FPRValue);
+  // *** set is for nets like interrupts  come back to this.
+  //found = rvviRefNetIndexGet("pc_rdata");
+  //rvviRefNetSet(found, InstructionData->PC, time);
+  
+}
+
+void set_gpr(int hart, int reg, uint64_t value){
+  rvviDutGprSet(hart, reg, value);
+}
+
+void set_fpr(int hart, int reg, uint64_t value){
+  rvviDutFprSet(hart, reg, value);
+}
+
 void DecodeRVVI(uint8_t *payload, ssize_t payloadsize, RequiredRVVI_t *InstructionData){
   // you know this actually easiser in assembly. :(
   uint8_t buf2[BUF_SIZ], buf3[BUF_SIZ];