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Merge pull request #594 from davidharrishmc/dev

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coverage improvements: fixing problems running ImperasDV on coverage …
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Rose Thompson 2024-01-24 10:33:51 -06:00 committed by GitHub
commit 495b8af1e7
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6 changed files with 14 additions and 9 deletions
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2
config/rv64gc/config.vh
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@ -41,7 +41,7 @@ localparam COUNTERS = 12'd32;
localparam ZICNTR_SUPPORTED = 1;
localparam ZIHPM_SUPPORTED = 1;
localparam ZFH_SUPPORTED = 1;
localparam ZFA_SUPPORTED = 0;
localparam ZFA_SUPPORTED = 1;
localparam SSTC_SUPPORTED = 1;
localparam ZICBOM_SUPPORTED = 1;
localparam ZICBOZ_SUPPORTED = 1;

3
sim/imperas.ic
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@ -11,6 +11,7 @@
--override cpu/mvendorid=0x602
--override cpu/marchid=0x24
--override refRoot/cpu/tvec_align=64
--override refRoot/cpu/envcfg_mask=1
# bit manipulation
--override cpu/add_Extensions=B
@ -21,6 +22,7 @@
--override cpu/Zcb=T
--override cpu/Zicond=T
--override cpu/Zfh=T
--override cpu/Zfa=T
# Cache block operations
--override cpu/Zicbom=T
@ -95,6 +97,7 @@
--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF
--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO error - 0x10069000 - 0x100600FF
--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI error - 0x10040000 - 0x10040FFF
#--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwxaA- 1248 " # UNCORE_RAM
--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM
# Enable the Imperas instruction coverage

5
src/fpu/fctrl.sv
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@ -86,9 +86,8 @@ module fctrl import cvw::*; #(parameter cvw_t P) (
assign Fmt = Funct7D[1:0];
assign Fmt2 = Rs2D[1:0]; // source format for fcvt fp->fp
assign SupportedFmt = (Fmt == 2'b00 | (Fmt == 2'b01 & P.D_SUPPORTED) |
(Fmt == 2'b10 & P.ZFH_SUPPORTED & {OpD[6:4], OpD[1:0]} != 5'b10011) | // fma not supported for Zfh
(Fmt == 2'b11 & P.Q_SUPPORTED));
assign SupportedFmt = (Fmt == 2'b00 | (Fmt == 2'b01 & P.D_SUPPORTED) |
(Fmt == 2'b10 & P.ZFH_SUPPORTED) | (Fmt == 2'b11 & P.Q_SUPPORTED));
assign SupportedFmt2 = (Fmt2 == 2'b00 | (Fmt2 == 2'b01 & P.D_SUPPORTED) |
(Fmt2 == 2'b10 & P.ZFH_SUPPORTED) | (Fmt2 == 2'b11 & P.Q_SUPPORTED));

9
tests/coverage/WALLY-init-lib.h
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@ -24,6 +24,8 @@
////////////////////////////////////////////////////////////////////////////////////////////////
// load code to initalize stack, handle interrupts, terminate
// The PMP tests are sensitive to the exact addresses in this code, so unfortunately
// modifying anything breaks those tests.
.section .text.init
.global rvtest_entry_point
@ -36,10 +38,11 @@ rvtest_entry_point:
csrw mtvec, t0 # Initialize MTVEC to trap_handler
csrw mideleg, zero # Don't delegate interrupts
csrw medeleg, zero # Don't delegate exceptions
li t0, -1 # set mtimecmp to biggest number so it doesnt interrupt again
li t1, 0x02004000 # MTIMECMP in CLINT
sd t0, 0(t1)
# li t0, -1 # set mtimecmp to biggest number so it doesnt interrupt again
# li t1, 0x02004000 # MTIMECMP in CLINT
# sd t0, 0(t1)
li t0, 0x80
# li t0, 0x00
csrw mie, t0 # Enable machine timer interrupt
la t0, topoftrapstack
csrw mscratch, t0 # MSCRATCH holds trap stack pointer

2
tests/coverage/fpu.S
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@ -139,7 +139,7 @@ main:
.word 0xc5000007 // Attempting to toggle (Op7 != 7) to 0 on line 97 in fctrl, not sure what instruction this works out to
.word 0xe0101053 // toggling (Rs2D == 0) to 0 on line 139 in fctrl. Illegal Intsr (like fclass but incorrect rs2)
.word 0xe0100053 // toggling (Rs2D == 0) to 0 on line 141 in fctrl. Illegal Intsr (like fmv but incorrect rs2)
.word 0x40500053 // toggling (Rs2D[4:2] == 0) to 0 on line 145 in fctrl.
.word 0x40D00053 // toggling (Rs2D[4:2] == 0) to 0 on line 145 in fctrl.
.word 0x40300053 // toggling SupportFmt2 to 0 on line 145 in fctrl.
.word 0x42100053 // toggling (Rs2D[1:0] != 1) to 0 on line 147 in fctrl. Illegal Instr
.word 0xf0100053 // toggling (Rs2D == 0) to 0 on line 143 in fctrl. Illegal Instr

2
tests/coverage/tlbmisc.S
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@ -114,7 +114,7 @@ main:
li t0, 1
ecall # switch back to supervisor mode
li t0, 0x80806000
jalr ra, t0 # jump to page to exercise ITLB with PBMT !=0 when ENVCFG_BPMTE=0
jalr ra, t0 # jump to page to exercise ITLB with PBMT !=0 when ENVCFG_PMTE=0
# change back to default trap handler after checking everything that might cause an instruction page fault
jal changetodefaulthandler