From 7215f48dda100d11053c7c2f5e92870b718e1c01 Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 23 Jan 2024 22:21:01 -0800 Subject: [PATCH 1/4] coverage improvements: fixing problems running ImperasDV on coverage tests --- config/rv64gc/config.vh | 2 +- sim/imperas.ic | 1 + tests/coverage/WALLY-init-lib.h | 9 ++++++--- tests/coverage/fpu.S | 2 +- 4 files changed, 9 insertions(+), 5 deletions(-) diff --git a/config/rv64gc/config.vh b/config/rv64gc/config.vh index bb3e79659..04a674b47 100644 --- a/config/rv64gc/config.vh +++ b/config/rv64gc/config.vh @@ -41,7 +41,7 @@ localparam COUNTERS = 12'd32; localparam ZICNTR_SUPPORTED = 1; localparam ZIHPM_SUPPORTED = 1; localparam ZFH_SUPPORTED = 1; -localparam ZFA_SUPPORTED = 0; +localparam ZFA_SUPPORTED = 1; localparam SSTC_SUPPORTED = 1; localparam ZICBOM_SUPPORTED = 1; localparam ZICBOZ_SUPPORTED = 1; diff --git a/sim/imperas.ic b/sim/imperas.ic index b35166429..7e029be9b 100644 --- a/sim/imperas.ic +++ b/sim/imperas.ic @@ -21,6 +21,7 @@ --override cpu/Zcb=T --override cpu/Zicond=T --override cpu/Zfh=T +--override cpu/Zfa=T # Cache block operations --override cpu/Zicbom=T diff --git a/tests/coverage/WALLY-init-lib.h b/tests/coverage/WALLY-init-lib.h index f450409fe..fdf9be6cf 100644 --- a/tests/coverage/WALLY-init-lib.h +++ b/tests/coverage/WALLY-init-lib.h @@ -24,6 +24,8 @@ //////////////////////////////////////////////////////////////////////////////////////////////// // load code to initalize stack, handle interrupts, terminate +// The PMP tests are sensitive to the exact addresses in this code, so unfortunately +// modifying anything breaks those tests. .section .text.init .global rvtest_entry_point @@ -36,10 +38,11 @@ rvtest_entry_point: csrw mtvec, t0 # Initialize MTVEC to trap_handler csrw mideleg, zero # Don't delegate interrupts csrw medeleg, zero # Don't delegate exceptions - li t0, -1 # set mtimecmp to biggest number so it doesnt interrupt again - li t1, 0x02004000 # MTIMECMP in CLINT - sd t0, 0(t1) +# li t0, -1 # set mtimecmp to biggest number so it doesnt interrupt again +# li t1, 0x02004000 # MTIMECMP in CLINT +# sd t0, 0(t1) li t0, 0x80 +# li t0, 0x00 csrw mie, t0 # Enable machine timer interrupt la t0, topoftrapstack csrw mscratch, t0 # MSCRATCH holds trap stack pointer diff --git a/tests/coverage/fpu.S b/tests/coverage/fpu.S index 0a9d4b7c1..0e3fd80d7 100644 --- a/tests/coverage/fpu.S +++ b/tests/coverage/fpu.S @@ -139,7 +139,7 @@ main: .word 0xc5000007 // Attempting to toggle (Op7 != 7) to 0 on line 97 in fctrl, not sure what instruction this works out to .word 0xe0101053 // toggling (Rs2D == 0) to 0 on line 139 in fctrl. Illegal Intsr (like fclass but incorrect rs2) .word 0xe0100053 // toggling (Rs2D == 0) to 0 on line 141 in fctrl. Illegal Intsr (like fmv but incorrect rs2) - .word 0x40500053 // toggling (Rs2D[4:2] == 0) to 0 on line 145 in fctrl. + .word 0x40D00053 // toggling (Rs2D[4:2] == 0) to 0 on line 145 in fctrl. .word 0x40300053 // toggling SupportFmt2 to 0 on line 145 in fctrl. .word 0x42100053 // toggling (Rs2D[1:0] != 1) to 0 on line 147 in fctrl. Illegal Instr .word 0xf0100053 // toggling (Rs2D == 0) to 0 on line 143 in fctrl. Illegal Instr From 66a1edb2617e3714b0602718a3b227bce331a7c6 Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 23 Jan 2024 23:11:49 -0800 Subject: [PATCH 2/4] More coverage touchup --- sim/imperas.ic | 2 +- tests/coverage/tlbmisc.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sim/imperas.ic b/sim/imperas.ic index 7e029be9b..494001660 100644 --- a/sim/imperas.ic +++ b/sim/imperas.ic @@ -96,7 +96,7 @@ --callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF --callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO error - 0x10069000 - 0x100600FF --callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI error - 0x10040000 - 0x10040FFF ---callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM +--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwxaA- 1248 " # UNCORE_RAM # Enable the Imperas instruction coverage #-extlib refRoot/cpu/cv=imperas.com/intercept/riscvInstructionCoverage/1.0 diff --git a/tests/coverage/tlbmisc.S b/tests/coverage/tlbmisc.S index a5200c21c..db1435008 100644 --- a/tests/coverage/tlbmisc.S +++ b/tests/coverage/tlbmisc.S @@ -114,7 +114,7 @@ main: li t0, 1 ecall # switch back to supervisor mode li t0, 0x80806000 - jalr ra, t0 # jump to page to exercise ITLB with PBMT !=0 when ENVCFG_BPMTE=0 + jalr ra, t0 # jump to page to exercise ITLB with PBMT !=0 when ENVCFG_PMTE=0 # change back to default trap handler after checking everything that might cause an instruction page fault jal changetodefaulthandler From d2f645819d7a3bf765c5be5b94e2e2236ba22c8c Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 24 Jan 2024 06:46:14 -0800 Subject: [PATCH 3/4] Added override to fix issue 582 menvcfg.FIOM writability; restored PMA for uncore RAM affecting AMO operations --- sim/imperas.ic | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sim/imperas.ic b/sim/imperas.ic index 494001660..4cebcf526 100644 --- a/sim/imperas.ic +++ b/sim/imperas.ic @@ -11,6 +11,7 @@ --override cpu/mvendorid=0x602 --override cpu/marchid=0x24 --override refRoot/cpu/tvec_align=64 +--override refRoot/cpu/envcfg_mask=1 # bit manipulation --override cpu/add_Extensions=B @@ -96,7 +97,8 @@ --callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0 error - 0x10000000 - 0x100000FF --callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO error - 0x10069000 - 0x100600FF --callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI error - 0x10040000 - 0x10040FFF ---callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwxaA- 1248 " # UNCORE_RAM +#--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwxaA- 1248 " # UNCORE_RAM +--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM # Enable the Imperas instruction coverage #-extlib refRoot/cpu/cv=imperas.com/intercept/riscvInstructionCoverage/1.0 From 17f579d4bac26ac3870c95f007614534e043dbe8 Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 24 Jan 2024 07:46:50 -0800 Subject: [PATCH 4/4] Reenabled fmadd.h, which is really supported by Zfh --- src/fpu/fctrl.sv | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/fpu/fctrl.sv b/src/fpu/fctrl.sv index 6d5a91aa6..705a112d1 100755 --- a/src/fpu/fctrl.sv +++ b/src/fpu/fctrl.sv @@ -86,9 +86,8 @@ module fctrl import cvw::*; #(parameter cvw_t P) ( assign Fmt = Funct7D[1:0]; assign Fmt2 = Rs2D[1:0]; // source format for fcvt fp->fp - assign SupportedFmt = (Fmt == 2'b00 | (Fmt == 2'b01 & P.D_SUPPORTED) | - (Fmt == 2'b10 & P.ZFH_SUPPORTED & {OpD[6:4], OpD[1:0]} != 5'b10011) | // fma not supported for Zfh - (Fmt == 2'b11 & P.Q_SUPPORTED)); + assign SupportedFmt = (Fmt == 2'b00 | (Fmt == 2'b01 & P.D_SUPPORTED) | + (Fmt == 2'b10 & P.ZFH_SUPPORTED) | (Fmt == 2'b11 & P.Q_SUPPORTED)); assign SupportedFmt2 = (Fmt2 == 2'b00 | (Fmt2 == 2'b01 & P.D_SUPPORTED) | (Fmt2 == 2'b10 & P.ZFH_SUPPORTED) | (Fmt2 == 2'b11 & P.Q_SUPPORTED));