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regression can overcome the fact that buildroots UART prints stuff

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bbracker 2021-06-24 02:00:01 -04:00
parent 409a73604c
commit 3d6b422e34
1 changed files with 2 additions and 2 deletions
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4
wally-pipelined/regression/regression-wally.py
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@ -26,12 +26,12 @@ configs = [
TestCase( TestCase(
name="busybear", name="busybear",
cmd="vsim -do wally-busybear-batch.do -c > {}", cmd="vsim -do wally-busybear-batch.do -c > {}",
grepstr="# loaded 100000 instructions" grepstr="loaded 100000 instructions"
), ),
TestCase( TestCase(
name="buildroot", name="buildroot",
cmd="vsim -do wally-buildroot-batch.do -c > {}", cmd="vsim -do wally-buildroot-batch.do -c > {}",
grepstr="# loaded 2500000 instructions" grepstr="loaded 2500000 instructions"
), ),
TestCase( TestCase(
name="rv32ic", name="rv32ic",