From 3d6b422e34ef8abb86df7104ae24ef74ebddab8a Mon Sep 17 00:00:00 2001
From: bbracker <bbracker@hmc.edu>
Date: Thu, 24 Jun 2021 02:00:01 -0400
Subject: [PATCH] regression can overcome the fact that buildroots UART prints
stuff
---
wally-pipelined/regression/regression-wally.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/wally-pipelined/regression/regression-wally.py b/wally-pipelined/regression/regression-wally.py
index fcd6d4be1..b1ded5e7a 100755
--- a/wally-pipelined/regression/regression-wally.py
+++ b/wally-pipelined/regression/regression-wally.py
@@ -26,12 +26,12 @@ configs = [
TestCase(
name="busybear",
cmd="vsim -do wally-busybear-batch.do -c > {}",
- grepstr="# loaded 100000 instructions"
+ grepstr="loaded 100000 instructions"
),
TestCase(
name="buildroot",
cmd="vsim -do wally-buildroot-batch.do -c > {}",
- grepstr="# loaded 2500000 instructions"
+ grepstr="loaded 2500000 instructions"
),
TestCase(
name="rv32ic",