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Merge pull request #1138 from rosethompson/main

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Fixed bug in spi_fifo and bug in zsbl
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Jordan Carlin 2024-11-25 14:47:39 -08:00 committed by GitHub
commit 37e68dbb53
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3 changed files with 3 additions and 3 deletions
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2
fpga/zsbl/spi.c
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@ -31,7 +31,7 @@
uint8_t spi_txrx(uint8_t byte) { uint8_t spi_txrx(uint8_t byte) {
spi_sendbyte(byte); spi_sendbyte(byte);
waittx(); waitrx();
return spi_readbyte(); return spi_readbyte();
} }

2
fpga/zsbl/spi.h
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@ -106,7 +106,7 @@ static inline void waittx() {
} }
static inline void waitrx() { static inline void waitrx() {
while(read_reg(SPI_IP) & 2) {} while(!(read_reg(SPI_IP) & 2)) {}
} }
static inline uint8_t spi_readbyte() { static inline uint8_t spi_readbyte() {

2
src/uncore/spi_fifo.sv
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@ -26,7 +26,7 @@ module spi_fifo #(parameter M=3, N=8)( // 2^M entries of N bits
assign rdata = mem[raddr]; assign rdata = mem[raddr];
always_ff @(posedge PCLK) always_ff @(posedge PCLK)
if (winc & ~wfull) mem[waddr] <= wdata; if (winc & wen & ~wfull) mem[waddr] <= wdata;
// write and read are enabled // write and read are enabled
always_ff @(posedge PCLK) always_ff @(posedge PCLK)