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zbc input mux structural

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Kevin Kim 2023-03-05 14:26:31 -08:00
parent 869e812aa8
commit 3656d42ac0
1 changed files with 10 additions and 27 deletions
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35
src/ieu/bmu/zbc.sv
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@ -30,39 +30,22 @@
`include "wally-config.vh" `include "wally-config.vh"
module zbc #(parameter WIDTH=32) ( module zbc #(parameter WIDTH=32) (
input logic [WIDTH-1:0] A, B, // Operands input logic [WIDTH-1:0] A, RevA, B, // Operands
input logic [2:0] Funct3, // Indicates operation to perform input logic [2:0] Funct3, // Indicates operation to perform
output logic [WIDTH-1:0] ZBCResult); // ZBC result output logic [WIDTH-1:0] ZBCResult); // ZBC result
logic [WIDTH-1:0] ClmulResult, RevClmulResult; logic [WIDTH-1:0] ClmulResult, RevClmulResult;
logic [WIDTH-1:0] RevA, RevB; logic [WIDTH-1:0] RevB;
logic [WIDTH-1:0] x,y; logic [WIDTH-1:0] x,y;
logic [1:0] select;
assign select = ~Funct3[1:0];
bitreverse #(WIDTH) brA(.a(A), .b(RevA));
bitreverse #(WIDTH) brB(.a(B), .b(RevB)); bitreverse #(WIDTH) brB(.a(B), .b(RevB));
// zbc input select mux
always_comb begin
casez (Funct3[1:0])
2'b01: begin //clmul
x = A;
y = B;
end
2'b11: begin //clmulh
x = {RevA[WIDTH-2:0], {1'b0}};
y = {{1'b0}, RevB[WIDTH-2:0]};
end
2'b10: begin //clmulr
x = RevA;
y = RevB;
end
default: begin
x = 0;
y = 0;
end
endcase
end mux3 #(WIDTH) xmux({RevA[WIDTH-2:0], {1'b0}}, RevA, A, select, x);
mux3 #(WIDTH) ymux({{1'b0},RevB[WIDTH-2:0]}, RevB, B, select, y);
clmul #(WIDTH) clm(.A(x), .B(y), .ClmulResult(ClmulResult)); clmul #(WIDTH) clm(.A(x), .B(y), .ClmulResult(ClmulResult));
bitreverse #(WIDTH) brClmulResult(.a(ClmulResult), .b(RevClmulResult)); bitreverse #(WIDTH) brClmulResult(.a(ClmulResult), .b(RevClmulResult));