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continued ZBC integration into ALU
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@ -39,7 +39,7 @@ module alu #(parameter WIDTH=32) (
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// CondInvB = ~B when subtracting, B otherwise. Shift = shift result. SLT/U = result of a slt/u instruction.
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// CondInvB = ~B when subtracting, B otherwise. Shift = shift result. SLT/U = result of a slt/u instruction.
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// FullResult = ALU result before adjusting for a RV64 w-suffix instruction.
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// FullResult = ALU result before adjusting for a RV64 w-suffix instruction.
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logic [WIDTH-1:0] CondInvB, Shift, SLT, SLTU, FullResult,ALUResult; // Intermediate results
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logic [WIDTH-1:0] CondInvB, Shift, SLT, SLTU, FullResult,ALUResult, ZBCResult; // Intermediate results
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logic Carry, Neg; // Flags: carry out, negative
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logic Carry, Neg; // Flags: carry out, negative
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logic LT, LTU; // Less than, Less than unsigned
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logic LT, LTU; // Less than, Less than unsigned
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logic W64; // RV64 W-type instruction
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logic W64; // RV64 W-type instruction
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@ -90,6 +90,16 @@ module alu #(parameter WIDTH=32) (
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else assign ALUResult = FullResult;
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else assign ALUResult = FullResult;
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if (`ZBC_SUPPORTED) begin
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if (`ZBC_SUPPORTED) begin
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zbc #(WIDTH) ZBC(.A(A), .B(B), .Funct3(Funct3), .ZBCResult(ZBCResult));
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end
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if (`ZBC_SUPPORTED) begin
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always_comb
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case ({Funct7, Funct3})
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10'b0000101_001: Result = ZBCResult;
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10'b0000101_011: Result = ZBCResult;
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10'b0000101_010: Result = ZBCResult;
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default: Result = ALUResult;
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endcase
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end else assign Result = ALUResult;
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end else assign Result = ALUResult;
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endmodule
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endmodule
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