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https://github.com/openhwgroup/cvw
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Fixed Verilator testbench issue from FunctionName by rolling back to old if. PC=0 detection is disabled for now.
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0ab3f28991
commit
25780f53ce
@ -110,6 +110,7 @@ module testbench;
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logic Validate;
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logic Validate;
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logic SelectTest;
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logic SelectTest;
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logic TestComplete;
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logic TestComplete;
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logic PrevPCZero;
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initial begin
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initial begin
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// look for arguments passed to simulation, or use defaults
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// look for arguments passed to simulation, or use defaults
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@ -354,15 +355,6 @@ module testbench;
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$display("Benchmark: coremark is done.");
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$display("Benchmark: coremark is done.");
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$stop;
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$stop;
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end
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end
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if (P.ZICSR_SUPPORTED & dut.core.ifu.PCM == 0 & dut.core.ifu.InstrM == 0 & dut.core.ieu.InstrValidM) begin
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$display("Program fetched illegal instruction 0x00000000 from address 0x00000000. Might be fault with no fault handler.");
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//$stop; // presently wally32/64priv tests trigger this for reasons not yet understood.
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end
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// modifications 4/3/24 kunlin & harris to speed up Verilator
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// For some reason, Verilator runs ~100x slower when these SelectTest and Validate codes are in the posedge clk block
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//end // added
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//always @(posedge SelectTest) // added
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if(SelectTest) begin
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if(SelectTest) begin
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if (riscofTest) begin
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if (riscofTest) begin
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memfilename = {pathname, tests[test], "/ref/ref.elf.memfile"};
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memfilename = {pathname, tests[test], "/ref/ref.elf.memfile"};
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@ -402,6 +394,7 @@ module testbench;
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always @(posedge Validate) // added
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always @(posedge Validate) // added
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`endif
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`endif
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if(Validate) begin
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if(Validate) begin
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if (PrevPCZero) totalerrors = totalerrors + 1; // error if PC is stuck at zero
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if (TEST == "buildroot")
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if (TEST == "buildroot")
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$fclose(uartoutfile);
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$fclose(uartoutfile);
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if (TEST == "embench") begin
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if (TEST == "embench") begin
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@ -632,8 +625,10 @@ module testbench;
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loggers (clk, reset, DCacheFlushStart, DCacheFlushDone, memfilename, TEST);
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loggers (clk, reset, DCacheFlushStart, DCacheFlushDone, memfilename, TEST);
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// track the current function or global label
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// track the current function or global label
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if (DEBUG > 0 | ((PrintHPMCounters | BPRED_LOGGER) & P.ZICNTR_SUPPORTED)) begin : FunctionName
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FunctionName #(P) FunctionName(.reset(reset_ext | TestBenchReset),
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FunctionName #(P) FunctionName(.reset(reset_ext | TestBenchReset),
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.clk(clk), .ProgramAddrMapFile(ProgramAddrMapFile), .ProgramLabelMapFile(ProgramLabelMapFile));
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.clk(clk), .ProgramAddrMapFile(ProgramAddrMapFile), .ProgramLabelMapFile(ProgramLabelMapFile));
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end
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// Append UART output to file for tests
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// Append UART output to file for tests
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if (P.UART_SUPPORTED) begin: uart_logger
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if (P.UART_SUPPORTED) begin: uart_logger
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@ -652,10 +647,16 @@ module testbench;
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// 1. jump to self loop (0x0000006f)
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// 1. jump to self loop (0x0000006f)
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// 2. a store word writes to the address "tohost"
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// 2. a store word writes to the address "tohost"
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// 3. or PC is stuck at 0
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// 3. or PC is stuck at 0
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always_comb begin
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TestComplete = ((InstrM == 32'h6f) & dut.core.InstrValidM ) |
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((dut.core.lsu.IEUAdrM == ProgramAddrLabelArray["tohost"] & dut.core.lsu.IEUAdrM != 0) & InstrMName == "SW" ) |
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always @(posedge clk) begin
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(FunctionName.PCM == 4 & dut.core.ieu.c.InstrValidM);
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// if (reset) PrevPCZero <= 0;
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// else if (dut.core.InstrValidM) PrevPCZero <= (FunctionName.PCM == 0 & dut.core.ifu.InstrM == 0);
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TestComplete <= ((InstrM == 32'h6f) & dut.core.InstrValidM ) |
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((dut.core.lsu.IEUAdrM == ProgramAddrLabelArray["tohost"] & dut.core.lsu.IEUAdrM != 0) & InstrMName == "SW"); // |
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// (FunctionName.PCM == 0 & dut.core.ifu.InstrM == 0 & dut.core.InstrValidM & PrevPCZero));
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// if (FunctionName.PCM == 0 & dut.core.ifu.InstrM == 0 & dut.core.InstrValidM & PrevPCZero)
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// $error("Program fetched illegal instruction 0x00000000 from address 0x00000000 twice in a row. Usually due to fault with no fault handler.");
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end
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end
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DCacheFlushFSM #(P) DCacheFlushFSM(.clk, .start(DCacheFlushStart), .done(DCacheFlushDone));
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DCacheFlushFSM #(P) DCacheFlushFSM(.clk, .start(DCacheFlushStart), .done(DCacheFlushDone));
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