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Lots more python cleanup

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This commit is contained in:
Jordan Carlin 2024-12-17 16:32:49 -08:00
parent 0e3030dc23
commit 21e35c9068
No known key found for this signature in database
20 changed files with 82 additions and 82 deletions

4
benchmarks/embench/embench_arch_sweep.py
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@ -31,7 +31,7 @@ def tabulate_arch_sweep(directory):
file_path = os.path.join(directory, file)
lines = []
try:
f = open(file_path, "r")
f = open(file_path)
lines = f.readlines()
except:
f.close()
@ -84,4 +84,4 @@ def run_arch_sweep():
directory = run_arch_sweep()
#directory = "run_20231120_072037-caches"
tabulate_arch_sweep(directory)
tabulate_arch_sweep(directory)

2
benchmarks/graphGen.py
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@ -104,4 +104,4 @@ def main():
if __name__ == '__main__':
sys.exit(main())
# "ls -Art ../addins/embench-iot/logs/*speed* | tail -n 1 " # gets most recent embench speed log
# "ls -Art ../addins/embench-iot/logs/*speed* | tail -n 1 " # gets most recent embench speed log

2
bin/CacheSim.py
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@ -230,7 +230,7 @@ def main(args):
atoms = 0
totalops = 0
with open(extfile, "r", encoding="utf-8") as f:
with open(extfile) as f:
for ln in f:
ln = ln.strip()
lninfo = ln.split()

6
bin/nightly_build.py
View File

@ -391,7 +391,7 @@ class TestRunner:
# Implement cleaning and formatting logic here
# Open up the file with only read permissions
with open(input_file, 'r') as input_file:
with open(input_file) as input_file:
uncleaned_output = input_file.read()
# use something like this function to detect pass and fail
@ -598,7 +598,7 @@ class TestRunner:
# Implement markdown to HTML conversion logic here
os.chdir(self.results_dir)
with open(markdown_file, 'r') as md_file:
with open(markdown_file) as md_file:
md_content = md_file.read()
html_content = markdown.markdown(md_content)
@ -632,7 +632,7 @@ class TestRunner:
os.chdir(self.results_dir)
html_file = "results.html"
with open(html_file, 'r') as html_file:
with open(html_file) as html_file:
body = html_file.read()
try:

26
bin/parseHPMC.py
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@ -46,7 +46,7 @@ def ParseBranchListFile(path):
is formated in row columns. Each row is a trace with the file, branch predictor type, and the parameters.
parameters can be any number and depend on the predictor type. Returns a list of lists.'''
lst = []
BranchList = open(path, 'r')
BranchList = open(path)
for line in BranchList:
tokens = line.split()
predictorLog = os.path.dirname(path) + '/' + tokens[0]
@ -62,7 +62,7 @@ def ProcessFile(fileName):
# 1 find lines with Read memfile and extract test name
# 2 parse counters into a list of (name, value) tuples (dictionary maybe?)
benchmarks = []
transcript = open(fileName, 'r')
transcript = open(fileName)
HPMClist = { }
testName = ''
for line in transcript.readlines():
@ -227,13 +227,13 @@ def ReportAsTable(benchmarkDict):
sys.stdout.write('benchmark\t\t')
for name in FirstLine:
if(len(name) < 8): sys.stdout.write('%s\t\t' % name)
else: sys.stdout.write('%s\t' % name)
if(len(name) < 8): sys.stdout.write(f'{name}\t\t')
else: sys.stdout.write(f'{name}\t')
sys.stdout.write('\n')
sys.stdout.write('size\t\t\t')
for size in SecondLine:
if(len(str(size)) < 8): sys.stdout.write('%d\t\t' % size)
else: sys.stdout.write('%d\t' % size)
if(len(str(size)) < 8): sys.stdout.write(f'{size}\t\t')
else: sys.stdout.write(f'{size}\t')
sys.stdout.write('\n')
if(args.summary):
@ -245,9 +245,9 @@ def ReportAsTable(benchmarkDict):
if(not args.summary):
for benchmark in benchmarkDict:
length = len(benchmark)
if(length < 8): sys.stdout.write('%s\t\t\t' % benchmark)
elif(length < 16): sys.stdout.write('%s\t\t' % benchmark)
else: sys.stdout.write('%s\t' % benchmark)
if(length < 8): sys.stdout.write(f'{benchmark}\t\t\t')
elif(length < 16): sys.stdout.write(f'{benchmark}\t\t')
else: sys.stdout.write(f'{benchmark}\t')
for (name, typ, entries, size, val) in benchmarkDict[benchmark]:
sys.stdout.write('%0.2f\t\t' % (val if not args.invert else 100 -val))
sys.stdout.write('\n')
@ -257,13 +257,13 @@ def ReportAsText(benchmarkDict):
mean = benchmarkDict['Mean']
print('Mean')
for (name, typ, entries, size, val) in mean:
sys.stdout.write('%s %s %0.2f\n' % (name, entries if not args.size else size, val if not args.invert else 100 - val))
sys.stdout.write(f'{name} {entries if not args.size else size} {val if not args.invert else 100 - val:0.2f}\n')
if(not args.summary):
for benchmark in benchmarkDict:
print(benchmark)
for (name, type, entries, size, val) in benchmarkDict[benchmark]:
sys.stdout.write('%s %s %0.2f\n' % (name, entries if not args.size else size, val if not args.invert else 100 - val))
sys.stdout.write(f'{name} {entries if not args.size else size} {val if not args.invert else 100 - val:0.2f}\n')
def Inversion(lst):
return [x if not args.invert else 100 - x for x in lst]
@ -354,7 +354,7 @@ def ReportAsGraph(benchmarkDict, bar, FileName):
axes.set_xticks(xdata)
axes.set_xticklabels(xdata)
axes.grid(color='b', alpha=0.5, linestyle='dashed', linewidth=0.5)
if(FileName == None): plt.show()
if FileName is None: plt.show()
else: plt.savefig(FileName)
# if(not args.summary):
@ -414,7 +414,7 @@ def ReportAsGraph(benchmarkDict, bar, FileName):
# on each piece.
for row in range(0, math.ceil(NumBenchmarks / BenchPerRow)):
(xlabelListTrunk, seriesDictTrunk) = SelectPartition(xlabelListBig, seriesDictBig, row, BenchPerRow)
FileName = 'barSegment%d.svg' % row
FileName = f'barSegment{row}.svg'
groupLen = len(xlabelListTrunk)
BarGraph(seriesDictTrunk, xlabelListTrunk, groupLen, FileName, (row == 0))

2
docs/docker/get_buildroot_testvector.py
View File

@ -11,4 +11,4 @@ BUILDROOT_SRC = "linux/buildroot-config-src/wally"
TESTVECTOR_SRC = "linux/testvector-generation"
shutil.copytree(os.path.join(WALLY_HOME, BUILDROOT_SRC), "./buildroot-config-src")
shutil.copytree(os.path.join(WALLY_HOME, TESTVECTOR_SRC), "./testvector-generation")
shutil.copytree(os.path.join(WALLY_HOME, TESTVECTOR_SRC), "./testvector-generation")

2
fpga/renumber.py
View File

@ -13,7 +13,7 @@ def main(args):
probenum = 0
countLines = 1
with open(args[0],'r') as xdcfile, open(args[1], 'w') as outfile:
with open(args[0]) as xdcfile, open(args[1], 'w') as outfile:
Lines = xdcfile.readlines()
for line in Lines:
t = re.sub("probe[0-9]+", f"probe{probenum}",line)

2
sim/slack-notifier/slack-notifier.py
View File

@ -13,7 +13,7 @@ if not os.path.isfile(sys.path[0]+'/slack-webhook-url.txt'):
print('Tutorial for slack webhook urls: https://bit.ly/BenSlackNotifier')
print('==============================================================')
else:
urlFile = open(sys.path[0]+'/slack-webhook-url.txt','r')
urlFile = open(sys.path[0]+'/slack-webhook-url.txt')
url = urlFile.readline().strip('\n')
# Traverse 3 parents up the process tree

6
synthDC/extractSummary.py
View File

@ -70,7 +70,7 @@ def synthsintocsv():
writer.writerow([width, config, mod, tech, freq, delay, area])
file.close()
def synthsfromcsv(filename):
Synth = namedtuple("Synth", "width config mod tech freq delay area")
with open(filename, newline='') as csvfile:
@ -186,7 +186,7 @@ def plotFeatures(tech, width, config):
plt.title(titlestr)
plt.savefig(final_directory + '/features_'+titlestr+'.png')
def plotConfigs(tech, mod=''):
delays, areas, labels = ([] for i in range(3))
freq = techdict[tech].targfreq
@ -227,7 +227,7 @@ def normAreaDelay(mod=''):
ax.legend(handles = fullLeg, loc='upper left')
plt.savefig(final_directory + '/normAreaDelay.png')
def addFO4axis(fig, ax, tech):
fo4 = techdict[tech].fo4

12
synthDC/ppa/ppaAnalyze.py
View File

@ -129,7 +129,7 @@ def getVals(tech, module, var, freq=None, width=None):
works at a specified target frequency or if none is given, uses the synthesis with the best achievable delay for each width
"""
if width != None:
if width is not None:
widthsToGet = width
else:
widthsToGet = widths
@ -137,7 +137,7 @@ def getVals(tech, module, var, freq=None, width=None):
metric = []
widthL = []
if freq != None:
if freq is not None:
for oneSynth in allSynths:
if (
(oneSynth.freq == freq)
@ -182,7 +182,7 @@ def csvOfBest(filename):
m = oneSynth.delay
best = oneSynth
if (best != None) & (best not in bestSynths):
if (best is not None) & (best not in bestSynths):
bestSynths += [best]
file = open(filename, "w")
@ -237,7 +237,7 @@ def genLegend(fits, coefs, r2=None, spec=None, ale=False):
eq = eq[3:] # chop off leading ' + '
if (r2 == None) or (spec == None):
if (r2 is None) or (spec is None):
return eq
else:
legend_elements = [lines.Line2D([0], [0], color=spec.color, label=eq)]
@ -339,7 +339,7 @@ def oneMetricPlot(
ax.add_artist(ax.legend(handles=fullLeg, loc=legLoc))
titleStr = (
" (target " + str(freq) + "MHz)"
if freq != None
if freq is not None
else " (best achievable delay)"
)
ax.set_title(module + titleStr)
@ -719,7 +719,7 @@ def plotPPA(mod, freq=None, norm=True, aleOpt=False):
else:
axs[i, j].legend(handles=leg, handlelength=1.5)
titleStr = " (target " + str(freq) + "MHz)" if freq != None else ""
titleStr = f" (target {freq} MHz)" if freq is not None else ""
plt.suptitle(mod + titleStr)
plt.tight_layout(pad=0.05, w_pad=1, h_pad=0.5, rect=(0, 0, 1, 0.97))

34
synthDC/ppa/ppaSynth.py
View File

@ -11,7 +11,7 @@ from multiprocessing import Pool
from ppaAnalyze import synthsfromcsv
def runCommand(module, width, tech, freq):
command = "make synth DESIGN={} WIDTH={} TECH={} DRIVE=INV FREQ={} MAXOPT=1 MAXCORES=1".format(module, width, tech, freq)
command = f"make synth DESIGN={module} WIDTH={width} TECH={tech} DRIVE=INV FREQ={freq} MAXOPT=1 MAXCORES=1"
subprocess.call(command, shell=True)
def deleteRedundant(synthsToRun):
@ -71,29 +71,29 @@ def allCombos(widths, modules, techs, freqs):
if __name__ == '__main__':
##### Run specific syntheses for a specific frequency
widths = [8, 16, 32, 64, 128]
modules = ['mul', 'adder', 'shifter', 'flop', 'comparator', 'binencoder', 'csa', 'mux2', 'mux4', 'mux8']
techs = ['sky90', 'sky130', 'tsmc28', 'tsmc28psyn']
freqs = [5000]
synthsToRun = allCombos(widths, modules, techs, freqs)
widths = [8, 16, 32, 64, 128]
modules = ['mul', 'adder', 'shifter', 'flop', 'comparator', 'binencoder', 'csa', 'mux2', 'mux4', 'mux8']
techs = ['sky90', 'sky130', 'tsmc28', 'tsmc28psyn']
freqs = [5000]
synthsToRun = allCombos(widths, modules, techs, freqs)
##### Run a sweep based on best delay found in existing syntheses
module = 'adder'
width = 32
tech = 'tsmc28psyn'
synthsToRun = freqSweep(module, width, tech)
module = 'adder'
width = 32
tech = 'tsmc28psyn'
synthsToRun = freqSweep(module, width, tech)
##### Run a sweep for multiple modules/widths based on best delay found in existing syntheses
modules = ['adder']
modules = ['adder']
# widths = [8, 16, 32, 64, 128]
widths = [32]
tech = 'sky130'
synthsToRun = freqModuleSweep(widths, modules, tech)
widths = [32]
tech = 'sky130'
synthsToRun = freqModuleSweep(widths, modules, tech)
##### Only do syntheses for which a run doesn't already exist
synthsToRun = filterRedundant(synthsToRun)
pool = Pool(processes=25)
synthsToRun = filterRedundant(synthsToRun)
pool = Pool(processes=25)
pool.starmap(runCommand, synthsToRun)
pool.close()
pool.join()
pool.join()

2
synthDC/scripts/wrapperGen.py
View File

@ -21,7 +21,7 @@ args=parser.parse_args()
fin_path = glob.glob(f"{os.getenv('WALLY')}/src/**/{args.DESIGN}.sv",recursive=True)[0]
fin = open(fin_path, "r", encoding='utf-8')
fin = open(fin_path)
lines = fin.readlines()

2
synthDC/wallySynth.py
View File

@ -12,7 +12,7 @@ def runSynth(config, mod, tech, freq, maxopt, usesram):
else:
prefix = "syn_"
cfg = prefix + config
command = "make synth DESIGN=wallypipelinedcore CONFIG={} MOD={} TECH={} DRIVE=FLOP FREQ={} MAXOPT={} USESRAM={} MAXCORES=1".format(cfg, mod, tech, freq, maxopt, usesram)
command = f"make synth DESIGN=wallypipelinedcore CONFIG={cfg} MOD={mod} TECH={tech} DRIVE=FLOP FREQ={freq} MAXOPT={maxopt} USESRAM={usesram} MAXCORES=1"
pool.map(mask, [command])
def mask(command):

2
testbench/sdc/ram2sdLoad.py
View File

@ -9,5 +9,5 @@ address = 0
for line in fileinput.input('-'):
# the 14- is to reverse the byte order to little endian
formatedLine = ' '.join(line[14-i:14-i+2] for i in range(0, len(line), 2))
sys.stdout.write('@{:08x} {:s}\n'.format(address, formatedLine))
sys.stdout.write(f'@{address:08x} {formatedLine:s}\n')
address+=8

22
tests/fp/combined_IF_vectors/extract_arch_vectors.py
View File

@ -60,9 +60,9 @@ class Config:
def create_vectors(my_config):
suite_folder_num = my_config.bits
if my_config.bits == 64 and my_config.letter == "F": suite_folder_num = 32
source_dir1 = "{}/addins/riscv-arch-test/riscv-test-suite/rv{}i_m/{}/src/".format(wally, suite_folder_num, my_config.letter)
source_dir2 = "{}/tests/riscof/work/riscv-arch-test/rv{}i_m/{}/src/".format(wally, my_config.bits, my_config.letter)
dest_dir = "{}/tests/fp/combined_IF_vectors/IF_vectors/".format(wally)
source_dir1 = f"{wally}/addins/riscv-arch-test/riscv-test-suite/rv{suite_folder_num}i_m/{my_config.letter}/src/"
source_dir2 = f"{wally}/tests/riscof/work/riscv-arch-test/rv{my_config.bits}i_m/{my_config.letter}/src/"
dest_dir = f"{wally}/tests/fp/combined_IF_vectors/IF_vectors/"
all_vectors1 = os.listdir(source_dir1)
filt_vectors1 = [v for v in all_vectors1 if my_config.filt in v]
@ -77,10 +77,10 @@ def create_vectors(my_config):
rounding_mode = "X"
flags = "XX"
# use name to create our new tv
dest_file = open("{}cvw_{}_{}.tv".format(dest_dir, my_config.bits, vector1[:-2]), 'w')
dest_file = open(f"{dest_dir}cvw_{my_config.bits}_{vector1[:-2]}.tv", 'w')
# open vectors
src_file1 = open(source_dir1 + vector1,'r')
src_file2 = open(source_dir2 + vector2,'r')
src_file1 = open(source_dir1 + vector1)
src_file2 = open(source_dir2 + vector2)
# for each test in the vector
reading = True
src_file2.readline() #skip first bc junk
@ -133,7 +133,7 @@ def create_vectors(my_config):
done = True
# put it all together
if not done:
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(op1val), ext_bits(op2val), ext_bits(answer.strip()), flags, rounding_mode)
translation = f"{operation}_{ext_bits(op1val)}_{ext_bits(op2val)}_{ext_bits(answer.strip())}_{flags}_{rounding_mode}"
dest_file.write(translation + "\n")
else:
# print("read false")
@ -182,7 +182,7 @@ def create_vectors(my_config):
flags = "XX"
# put it all together
if not done:
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(op1val), ext_bits(op2val), ext_bits(answer.strip()), flags.strip(), rounding_mode)
translation = f"{operation}_{ext_bits(op1val)}_{ext_bits(op2val)}_{ext_bits(answer.strip())}_{flags.strip()}_{rounding_mode}"
dest_file.write(translation + "\n")
else:
# print("read false")
@ -230,7 +230,7 @@ def create_vectors(my_config):
flags = "XX"
# put it all together
if not done:
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(op1val), ext_bits(op2val), ext_bits(answer.strip()), flags.strip(), rounding_mode)
translation = f"{operation}_{ext_bits(op1val)}_{ext_bits(op2val)}_{ext_bits(answer.strip())}_{flags.strip()}_{rounding_mode}"
dest_file.write(translation + "\n")
else:
# print("read false")
@ -279,7 +279,7 @@ def create_vectors(my_config):
# put it all together
if not done:
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(op1val), ext_bits(op2val), ext_bits(answer.strip()), flags, rounding_mode)
translation = f"{operation}_{ext_bits(op1val)}_{ext_bits(op2val)}_{ext_bits(answer.strip())}_{flags}_{rounding_mode}"
dest_file.write(translation + "\n")
else:
# print("read false")
@ -309,4 +309,4 @@ Config(64, "M", "remuw", "remuw-", 9)
]
for c in config_list:
create_vectors(c)
create_vectors(c)

12
tests/fp/combined_IF_vectors/extract_testfloat_vectors.py
View File

@ -27,8 +27,8 @@ round_dict = {
print("creating testfloat div test vectors")
source_dir = "{}/tests/fp/vectors/".format(wally)
dest_dir = "{}/tests/fp/combined_IF_vectors/IF_vectors/".format(wally)
source_dir = f"{wally}/tests/fp/vectors/"
dest_dir = f"{wally}/tests/fp/combined_IF_vectors/IF_vectors/"
all_vectors = os.listdir(source_dir)
div_vectors = [v for v in all_vectors if "div" in v]
@ -42,13 +42,13 @@ for vector in div_vectors:
# use name to create our new tv
dest_file = open(dest_dir + "cvw_" + vector, 'a')
# open vector
src_file = open(source_dir + vector,'r')
src_file = open(source_dir + vector)
# for each test in the vector
for i in src_file.readlines():
translation = "" # this stores the test that we are currently working on
[input_1, input_2, answer, flags] = i.split("_") # separate inputs, answer, and flags
# put it all together, strip nec for removing \n on the end of the flags
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(input_1), ext_bits(input_2), ext_bits(answer), flags.strip(), rounding_mode)
translation = f"{operation}_{ext_bits(input_1)}_{ext_bits(input_2)}_{ext_bits(answer)}_{flags.strip()}_{rounding_mode}"
dest_file.write(translation + "\n")
dest_file.close()
src_file.close()
@ -67,7 +67,7 @@ for vector in sqrt_vectors:
# use name to create our new tv
dest_file = open(dest_dir + "cvw_" + vector, 'a')
# open vector
src_file = open(source_dir + vector,'r')
src_file = open(source_dir + vector)
# for each test in the vector
for i in src_file.readlines():
translation = "" # this stores the test that we are currently working on
@ -76,4 +76,4 @@ for vector in sqrt_vectors:
translation = "{}_{}_{}_{}_{}_{}".format(operation, ext_bits(input_1), "X"*32, ext_bits(answer), flags.strip(), rounding_mode)
dest_file.write(translation + "\n")
dest_file.close()
src_file.close()
src_file.close()

2
tests/riscof/sail_cSim/__init__.py
View File

@ -1,2 +1,2 @@
from pkgutil import extend_path
__path__ = extend_path(__path__, __name__)
__path__ = extend_path(__path__, __name__)

8
tests/riscof/sail_cSim/riscof_sail_cSim.py
View File

@ -107,9 +107,9 @@ class sail_cSim(pluginTemplate):
if ('NO_SAIL=True' in testentry['macros']):
# if the tests can't run on SAIL we copy the reference output to the src directory
reference_output = re.sub("/src/","/references/", re.sub(".S",".reference_output", test))
execute += 'cut -c-{0:g} {1} > {2}'.format(8, reference_output, sig_file) #use cut to remove comments when copying
execute += f'cut -c-{8:g} {reference_output} > {sig_file}' #use cut to remove comments when copying
else:
execute += self.sail_exe[self.xlen] + ' -z268435455 -i --trace=step ' + self.sailargs + ' --test-signature={0} {1} > {2}.log 2>&1;'.format(sig_file, elf, test_name)
execute += self.sail_exe[self.xlen] + ' -z268435455 -i --trace=step ' + self.sailargs + f' --test-signature={sig_file} {elf} > {test_name}.log 2>&1;'
cov_str = ' '
for label in testentry['coverage_labels']:
@ -117,10 +117,10 @@ class sail_cSim(pluginTemplate):
if cgf_file is not None:
coverage_cmd = 'riscv_isac --verbose info coverage -d \
-t {0}.log --parser-name c_sail -o coverage.rpt \
-t {}.log --parser-name c_sail -o coverage.rpt \
--sig-label begin_signature end_signature \
--test-label rvtest_code_begin rvtest_code_end \
-e ref.elf -c {1} -x{2} {3};'.format(\
-e ref.elf -c {} -x{} {};'.format(\
test_name, ' -c '.join(cgf_file), self.xlen, cov_str)
else:
coverage_cmd = ''

12
tests/riscof/spike/riscof_spike.py
View File

@ -186,22 +186,22 @@ class spike(pluginTemplate):
# cmd = self.compile_cmd.format(testentry['isa'].lower().replace('zicsr', ' ', 2), self.xlen, test, elf, compile_macros)
cmd = self.compile_cmd.format(testentry['isa'].lower(), self.xlen, test, elf, compile_macros)
# if the user wants to disable running the tests and only compile the tests, then
# the "else" clause is executed below assigning the sim command to simple no action
# echo statement.
# if the user wants to disable running the tests and only compile the tests, then
# the "else" clause is executed below assigning the sim command to simple no action
# echo statement.
if self.target_run:
# set up the simulation command. Template is for spike. Please change.
if ('NO_SAIL=True' in testentry['macros']):
# if the tests can't run on SAIL we copy the reference output to the src directory
reference_output = re.sub("/src/","/references/", re.sub(".S",".reference_output", test))
simcmd = 'cut -c-{0:g} {1} > {2}'.format(8, reference_output, sig_file) #use cut to remove comments when copying
simcmd = f'cut -c-{8:g} {reference_output} > {sig_file}' #use cut to remove comments when copying
else:
simcmd = self.dut_exe + ' --isa={0} +signature={1} +signature-granularity=4 {2}'.format(self.isa, sig_file, elf)
simcmd = self.dut_exe + f' --isa={self.isa} +signature={sig_file} +signature-granularity=4 {elf}'
else:
simcmd = 'echo "NO RUN"'
# concatenate all commands that need to be executed within a make-target.
execute = '@cd {0}; {1}; {2};'.format(testentry['work_dir'], cmd, simcmd)
execute = '@cd {}; {}; {};'.format(testentry['work_dir'], cmd, simcmd)
# create a target. The makeutil will create a target with the name "TARGET<num>" where num
# starts from 0 and increments automatically for each new target that is added

4
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/periph-test-signature-address-calculator.py
View File

@ -17,7 +17,7 @@ if __name__ == "__main__":
line_num = int(sig_adr / 4) + 1
offset = sig_adr & 0x3F
test_num = int((sig_adr-offset)/int("40",16))
print("IntrNum 0x{:02X}".format(test_num))
print("Offset 0x{:02X}".format(offset))
print(f"IntrNum 0x{test_num:02X}")
print(f"Offset 0x{offset:02X}")
print("LineNum "+str(line_num))