Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Remove python semicolons

Browse Source
This commit is contained in:
Jordan Carlin 2024-12-17 15:37:19 -08:00
parent d0b122a58a
commit 0e3030dc23
No known key found for this signature in database
5 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
benchmarks/embench/embench_arch_sweep.py
View File

@ -43,8 +43,8 @@ def tabulate_arch_sweep(directory):
match = re.search(p, line)
if match:
prog = match.group(1)
result = match.group(2);
d[arch][prog] = result;
result = match.group(2)
d[arch][prog] = result
#print(match.group(1)+" " + match.group(2))
f.close()
for arch in [""] + archs:
@ -53,7 +53,7 @@ def tabulate_arch_sweep(directory):
for prog in d[archs[0]]:
print(prog, end="\t")
for arch in archs:
entry = d[arch].get(prog, "n/a");
entry = d[arch].get(prog, "n/a")
print (entry, end="\t")
print("")
print("New geo mean", end="\t")

2
bin/parseHPMC.py
View File

@ -329,7 +329,7 @@ def ReportAsGraph(benchmarkDict, bar, FileName):
# group the parameterizations by the common typ.
sequencies = {}
for (name, typ, entries, size, value) in benchmarkDict['Mean']:
if not typ in sequencies:
if typ not in sequencies:
sequencies[typ] = [(entries if not args.size else int(size/8), value)]
else:
sequencies[typ].append((entries if not args.size else int(size/8) ,value))

4
bin/regression-wally
View File

@ -298,14 +298,14 @@ def addTestsByDir(testDir, config, sim, lockstepMode=0):
if coverStr == "--fcov": # use --fcov in place of --lockstep
cmdPrefix=f"wsim --sim {sim} {coverStr} {config}"
gs="Mismatches : 0"
if ("cvw-arch-verif/tests" in testDir and not "priv" in testDir):
if ("cvw-arch-verif/tests" in testDir and "priv" not in testDir):
fileEnd = "ALL.elf"
else:
fileEnd = ".elf"
elif coverStr == "--ccov":
cmdPrefix=f"wsim --sim {sim} {coverStr} {config}"
gs="Single Elf file tests are not signatured verified."
if ("cvw-arch-verif/tests" in testDir and not "priv" in testDir):
if ("cvw-arch-verif/tests" in testDir and "priv" not in testDir):
fileEnd = "ALL.elf"
else:
fileEnd = ".elf"

2
synthDC/extractSummary.py
View File

@ -282,4 +282,4 @@ if __name__ == '__main__':
plotConfigs('sky130', mod='orig')
plotConfigs('tsmc28psyn', mod='orig')
normAreaDelay(mod='orig')
os.system("./extractArea.pl");
os.system("./extractArea.pl")

2
synthDC/scripts/wrapperGen.py
View File

@ -15,7 +15,7 @@ import os
parser = argparse.ArgumentParser()
parser.add_argument("DESIGN")
parser.add_argument("HDLPATH");
parser.add_argument("HDLPATH")
args=parser.parse_args()