soc/fifo: Add copyright headers

soc/fifo/fifo.sv

@@ -1,3 +1,32 @@
+///////////////////////////////////////////
+// fifo.sv
+//
+// Written: Clifford E Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: Asynchronous FIFO
+// 
+// Documentation: 
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
+
 module fifo #(parameter DSIZE = 8,
 	       parameter ASIZE = 4)
    (rdata, wfull, rempty, wdata, 

soc/fifo/fifomem.sv

@@ -1,5 +1,31 @@
+///////////////////////////////////////////
+// fifomem.sv
+//
+// Written: Clifford E. Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: FIFO memory buffer
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
 
-// DATASIZE = Memory data word width    
+// DATASIZE = Memory data word width
 // ADDRSIZE = Number of mem address bits
 module fifomem #(parameter  DATASIZE = 8, 
 		 parameter  ADDRSIZE = 4) 

soc/fifo/rptr_empty.sv

@@ -1,3 +1,31 @@
+///////////////////////////////////////////
+// rptr_empty.sv
+//
+// Written: Clifford E Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: FIFO read pointer and empty generation logic
+// 
+// Documentation: 
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
 module rptr_empty #(parameter ADDRSIZE = 4)
    (rempty, raddr, rptr, rq2_wptr, rinc, rclk, rrst_n);
 

soc/fifo/sync_r2w.sv

@@ -1,3 +1,31 @@
+///////////////////////////////////////////
+// sync_r2w.sv
+//
+// Written: Clifford E Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: FIFO read-domain to write-domain synchronizer
+// 
+// Documentation: 
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
 module sync_r2w #(parameter ADDRSIZE = 4)
    (wq2_rptr, rptr, wclk, wrst_n);
 

soc/fifo/sync_w2r.sv

@@ -1,3 +1,31 @@
+///////////////////////////////////////////
+// sync_w2r.sv
+//
+// Written: Clifford E Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: FIFO write-domain to read-domain synchronizer
+// 
+// Documentation: 
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
 module sync_w2r #(parameter ADDRSIZE = 4)
    (rq2_wptr, wptr, rclk, rrst_n);
 

soc/fifo/wptr_full.sv

@@ -1,3 +1,31 @@
+///////////////////////////////////////////
+// wptr_full.sv
+//
+// Written: Clifford E Cummings 16 June 2005
+// Modified: james.stine@okstate.edu 19 February 2024
+//
+// Purpose: FIFO write pointer and full generation logic
+// 
+// Documentation: 
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
 module wptr_full  #(parameter ADDRSIZE = 4)
    (wfull, waddr, wptr, wq2_rptr, winc, wclk, wrst_n);