Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-01 01:14:31 +00:00
Code Issues Packages Projects Releases Wiki Activity

took sign extension out of shifter

Browse Source
This commit is contained in:
Kevin Kim 2023-02-24 17:09:56 -08:00
parent 00a0170b30
commit 1d4200e3a3
2 changed files with 49 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
src/ieu/alu.sv
View File

@ -54,7 +54,8 @@ module alu #(parameter WIDTH=32) (
logic ALUOp; // 0 for address generation addition or 1 for regular ALU ops logic ALUOp; // 0 for address generation addition or 1 for regular ALU ops
logic Asign, Bsign; // Sign bits of A, B logic Asign, Bsign; // Sign bits of A, B
logic Rotate; logic Rotate;
logic [WIDTH:0] shA; // 65 bit input source to shifter logic [WIDTH:0] shA; // XLEN+1 bit input source to shifter
logic [WIDTH-1:0] rotA; // XLEN bit input source to shifter
if (`ZBS_SUPPORTED) begin: zbsdec if (`ZBS_SUPPORTED) begin: zbsdec
@ -63,15 +64,22 @@ module alu #(parameter WIDTH=32) (
end else assign CondMaskB = B; end else assign CondMaskB = B;
if (WIDTH == 64) begin // Sign/Zero extend mux
always_comb if (WIDTH == 64) begin // rv64 must handle word s/z extensions
case ({W64, SubArith}) always_comb
2'b00: shA = {{1'b0}, A}; case ({W64, SubArith})
2'b01: shA = {A[63], A}; 2'b00: shA = {{1'b0}, A};
2'b10: shA = {{33'b0}, A[31:0]}; 2'b01: shA = {A[63], A};
2'b11: shA = {{33{A[31]}}, A[31:0]}; 2'b10: shA = {{33'b0}, A[31:0]};
endcase 2'b11: shA = {{33{A[31]}}, A[31:0]};
end else assign shA = (SubArith) ? {A[31], A} : {{1'b0},A}; endcase
end else assign shA = (SubArith) ? {A[31], A} : {{1'b0},A}; // rv32 does need to handle s/z extensions
// shifter rotate source select mux
if (`ZBB_SUPPORTED) begin
if (WIDTH == 64) assign rotA = (W64) ? {A[31:0], A[31:0]} : A;
else assign rotA = A; // NOTE: change this for the future!
end else assign rotA = A;
if (`ZBA_SUPPORTED) begin: zbamuxes if (`ZBA_SUPPORTED) begin: zbamuxes
// Zero Extend Mux // Zero Extend Mux
@ -101,7 +109,7 @@ module alu #(parameter WIDTH=32) (
assign {Carry, Sum} = CondShiftA + CondInvB + {{(WIDTH-1){1'b0}}, SubArith}; assign {Carry, Sum} = CondShiftA + CondInvB + {{(WIDTH-1){1'b0}}, SubArith};
// Shifts // Shifts
shifternew sh(.shA(shA), .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .Arith(SubArith), .W64, .Y(Shift), .Rotate(Rotate)); shifternew sh(.shA(shA), .rotA(rotA), .Amt(B[`LOG_XLEN-1:0]), .Right(Funct3[2]), .W64(W64), .Y(Shift), .Rotate(Rotate));
// Condition code flags are based on subtraction output Sum = A-B. // Condition code flags are based on subtraction output Sum = A-B.
// Overflow occurs when the numbers being subtracted have the opposite sign // Overflow occurs when the numbers being subtracted have the opposite sign

128
src/ieu/shifternew.sv
View File

@ -30,120 +30,52 @@
`include "wally-config.vh" `include "wally-config.vh"
module shifternew ( module shifternew (
input logic [`XLEN:0] shA, // Source input logic [`XLEN:0] shA, // shift Source
input logic [`XLEN-1:0] rotA, // rotate source
input logic [`LOG_XLEN-1:0] Amt, // Shift amount input logic [`LOG_XLEN-1:0] Amt, // Shift amount
input logic Right, Arith, W64, Rotate, // Shift right, arithmetic, RV64 W-type shift input logic Right, Rotate, W64, // Shift right, rotate signals
output logic [`XLEN-1:0] Y); // Shifted result output logic [`XLEN-1:0] Y); // Shifted result
logic [2*`XLEN-2:0] z, zshift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits logic [2*`XLEN-2:0] z, zshift; // Input to funnel shifter, shifted amount before truncated to 32 or 64 bits
logic [`LOG_XLEN-1:0] amttrunc, offset, CondOffsetTrunc; // Shift amount adjusted for RV64, right-shift amount logic [`LOG_XLEN-1:0] amttrunc, offset; // Shift amount adjusted for RV64, right-shift amount
if (`XLEN==32) begin:shifter // RV32 if (`ZBB_SUPPORTED) begin: rotfunnel
always_comb // funnel mux if (`XLEN==32) begin // rv32 with rotates
if (Right) z = {{31{shA[32]}}, shA[31:0]}; always_comb // funnel mux
else z = {shA[31:0], 31'b0}; case({Right, Rotate})
assign amttrunc = Amt; // shift amount 2'b00: z = {shA[31:0], 31'b0};
end else begin:shifter // RV64 2'b01: z = {rotA,rotA[31:1]};
always_comb // funnel mux 2'b10: z = {{31{shA[32]}}, shA[31:0]};
if (Right) z = {{63{shA[64]}},shA[63:0]}; 2'b11: z = {rotA[30:0],rotA};
else z = {shA[63:0],{63'b0}}; endcase
assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift assign amttrunc = Amt; // shift amount
end end else begin // rv64 with rotates
// Handle left and right shifts with a funnel shifter. always_comb // funnel mux
// For RV32, only 32-bit shifts are needed. case ({Right, Rotate})
// For RV64, 32- and 64-bit shifts are needed, with sign extension. 2'b00: z = {shA[63:0],{63'b0}};
/* 2'b01: z = {rotA, rotA[63:1]};
// Funnel shifter input (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong) 2'b10: z = {{63{shA[64]}},shA[63:0]};
if (`XLEN==32) begin:shifter // RV32 2'b11: z = {rotA[62:0],rotA[63:0]};
always_comb // funnel mux endcase
if (Right) assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
if (Arith) z = {{31{A[31]}}, A}; end
else z = {31'b0, A}; end else begin: norotfunnel
else z = {A, 31'b0};
assign amttrunc = Amt; // shift amount
end else begin:shifter // RV64
always_comb // funnel mux
if (W64) begin // 32-bit shifts
if (Right)
if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
else z = {95'b0, A[31:0]};
else z = {32'b0, A[31:0], 63'b0};
end else begin
if (Right)
if (Arith) z = {{63{A[63]}}, A};
else z = {63'b0, A};
else z = {A, 63'b0};
end
assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
end
*/
/*
if (`ZBB_SUPPORTED) begin: rotFunnel // HANDLES ROTATE
if (`XLEN==32) begin:shifter // RV32 if (`XLEN==32) begin:shifter // RV32
always_comb // funnel mux always_comb // funnel mux
if (Right) if (Right) z = {{31{shA[32]}}, shA[31:0]};
if (Rotate) z = {A[30:0], A[31:0]}; //ror (rv32) else z = {shA[31:0], 31'b0};
else
if (Arith) z = {{31{A[31]}}, A};
else z = {31'b0, A};
else
if (Rotate) z = {A[31:0], A[31:1]}; //rol (rv32)
else z = {A, 31'b0};
assign amttrunc = Amt; // shift amount assign amttrunc = Amt; // shift amount
end else begin:shifter // RV64 end else begin:shifter // RV64
always_comb // funnel mux always_comb // funnel mux
if (W64) begin // 32-bit shifts if (Right) z = {{63{shA[64]}},shA[63:0]};
if (Right) else z = {shA[63:0],{63'b0}};
if (Rotate) z = {{64'b0},A[30:0],A[31:0]}; //rorw
else
if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
else z = {95'b0, A[31:0]};
else
if (Rotate) z = {{64'b0},A[31:0],A[31:1]}; //rolw
else z = {32'b0, A[31:0], 63'b0};
end else begin
if (Right)
if (Rotate) z = {A[62:0], A[63:0]}; //ror
else
if (Arith) z = {{63{A[63]}}, A};
else z = {63'b0, A};
else
if (Rotate) z = {A[63:0], A[63:1]}; //rol
else z = {A, 63'b0};
end
assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
end
end else begin: norotFunnel
if (`XLEN==32) begin:shifter // RV32
always_comb // funnel mux
if (Right)
if (Arith) z = {{31{A[31]}}, A};
else z = {31'b0, A};
else z = {A, 31'b0};
assign amttrunc = Amt; // shift amount
end else begin:shifter // RV64
always_comb // funnel mux
if (W64) begin // 32-bit shifts
if (Right)
if (Arith) z = {64'b0, {31{A[31]}}, A[31:0]};
else z = {95'b0, A[31:0]};
else z = {32'b0, A[31:0], 63'b0};
end else begin
if (Right)
if (Arith) z = {{63{A[63]}}, A};
else z = {63'b0, A};
else z = {A, 63'b0};
end
assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift assign amttrunc = W64 ? {1'b0, Amt[4:0]} : Amt; // 32- or 64-bit shift
end end
end end
*/
// Opposite offset for right shifts // Opposite offset for right shifts
assign offset = Right ? amttrunc : ~amttrunc; assign offset = Right ? amttrunc : ~amttrunc;
//if (`XLEN == 64) assign CondOffsetTrunc = (W64 & Rotate) ? {{1'b0}, offset[4:0]} : offset;
//else assign CondOffsetTrunc = offset;
// Funnel operation // Funnel operation
assign zshift = z >> offset; assign zshift = z >> offset;