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initial work on dm for FP regs in debug spec

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James Stine 2024-06-06 18:12:43 -05:00
parent cd7624fb97
commit 12a4f2b97e
1 changed files with 56 additions and 52 deletions
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108
src/debug/dm.sv
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@ -26,31 +26,37 @@
//////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////
module dm import cvw::*; #(parameter cvw_t P) ( module dm import cvw::*; #(parameter cvw_t P) (
input logic clk, input logic clk,
input logic rst, input logic rst,
// External JTAG signals // External JTAG signals
input logic tck, input logic tck,
input logic tdi, input logic tdi,
input logic tms, input logic tms,
output logic tdo, output logic tdo,
// Platform reset signal // Platform reset signal
output logic NdmReset, output logic NdmReset,
// Core hazard signal // Core hazard signal
output logic DebugStall, output logic DebugStall,
// Scan Chain // Scan Chain
output logic ScanEn, output logic ScanEn,
input logic ScanIn, input logic ScanIn,
output logic ScanOut, output logic ScanOut,
output logic GPRSel, output logic GPRSel,
output logic DebugCapture, output logic DebugCapture,
output logic DebugGPRUpdate, output logic DebugGPRUpdate,
output logic [4:0] GPRAddr, output logic [4:0] GPRAddr,
output logic GPRScanEn, output logic GPRScanEn,
input logic GPRScanIn, input logic GPRScanIn,
output logic GPRScanOut output logic GPRScanOut,
output logic FPRSel,
output logic DebugFPRUpdate,
output logic [4:0] FPRAddr,
output logic FPRScanEn,
input logic FPRScanIn,
output logic FPRScanOut
); );
`include "debug.vh" `include "debug.vh"
@ -114,46 +120,45 @@ module dm import cvw::*; #(parameter cvw_t P) (
logic [31:0] Data2Wr; // Muxed inputs to DataX regs logic [31:0] Data2Wr; // Muxed inputs to DataX regs
logic [31:0] Data3Wr; // Muxed inputs to DataX regs logic [31:0] Data3Wr; // Muxed inputs to DataX regs
// message registers // message registers
logic [31:0] Data0; // 0x04 logic [31:0] Data0; // 0x04
logic [31:0] Data1; // 0x05 logic [31:0] Data1; // 0x05
logic [31:0] Data2; // 0x06 logic [31:0] Data2; // 0x06
logic [31:0] Data3; // 0x07 logic [31:0] Data3; // 0x07
// debug module registers // debug module registers
logic [31:0] DMControl; // 0x10 logic [31:0] DMControl; // 0x10
logic [31:0] DMStatus; // 0x11 logic [31:0] DMStatus; // 0x11
logic [31:0] AbstractCS; // 0x16 logic [31:0] AbstractCS; // 0x16
logic [31:0] SysBusCS; // 0x38 logic [31:0] SysBusCS; // 0x38
//// DM register fields //// DM register fields
// DMControl // DMControl
logic AckUnavail; logic AckUnavail;
logic DmActive; // This bit is used to (de)activate the DM. Toggling acts as reset logic DmActive; // This bit is used to (de)activate the DM. Toggling acts as reset
// DMStatus // DMStatus
logic StickyUnavail; logic StickyUnavail;
logic ImpEBreak; logic ImpEBreak;
logic AllResumeAck; logic AllResumeAck;
logic AnyResumeAck; logic AnyResumeAck;
logic AllNonExistent; logic AllNonExistent;
logic AnyNonExistent; logic AnyNonExistent;
logic AllUnavail; // TODO logic AllUnavail; // TODO
logic AnyUnavail; logic AnyUnavail;
logic AllRunning; logic AllRunning;
logic AnyRunning; logic AnyRunning;
logic AllHalted; logic AllHalted;
logic AnyHalted; logic AnyHalted;
const logic Authenticated = 1; const logic Authenticated = 1;
logic AuthBusy; logic AuthBusy;
const logic HasResetHaltReq = 1; const logic HasResetHaltReq = 1;
logic ConfStrPtrValid; logic ConfStrPtrValid;
const logic [3:0] Version = 3; // DM Version const logic [3:0] Version = 3; // DM Version
// AbstractCS // AbstractCS
const logic [4:0] ProgBufSize = 0; const logic [4:0] ProgBufSize = 0;
logic Busy; logic Busy;
const logic RelaxedPriv = 1; const logic RelaxedPriv = 1;
logic [2:0] CmdErr; logic [2:0] CmdErr;
const logic [3:0] DataCount = (P.XLEN/32); const logic [3:0] DataCount = (P.XLEN/32);
// Pack registers // Pack registers
assign DMControl = {2'b0, 1'b0, 2'b0, 1'b0, 10'b0, assign DMControl = {2'b0, 1'b0, 2'b0, 1'b0, 10'b0,
@ -357,7 +362,6 @@ module dm import cvw::*; #(parameter cvw_t P) (
end end
end end
// Abstract command engine // Abstract command engine
// Due to length of the register scan chain, // Due to length of the register scan chain,
// abstract commands execute independently of other DM operations // abstract commands execute independently of other DM operations