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Linux test now gets through first 8 instructions!

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fixes the python parser:
  get the value, not function name, of PC
  only write changes to registers instead of registers every cycle
temporarilly NOP out CSRR instruction (with the canonical NOP), that was breaking this
dont stop on errors, print them prettier
This commit is contained in:
Noah Boorstin 2021-01-23 16:42:17 -05:00
parent a66bd9008c
commit 117713be89
2 changed files with 8 additions and 8 deletions
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6
wally-pipelined/src/testbench-busybear.sv
View File

@ -81,8 +81,8 @@ module testbench_busybear #(parameter XLEN=64, MISA=32'h00000104, ZCSR = 1, ZCOU
scan_file_rf = $fscanf(data_file_rf, "%x\n", rfExpected[j]);
// check things!
if (rf[j*64+63 -: 64] != rfExpected[j]) begin
$display("%t ps: rf[%i] does not equal rf expected: %x, %x", $time, j, rf[j*64+63 -: 64], rfExpected[j]);
$stop;
$display("%t ps: rf[%0d] does not equal rf expected: %x, %x", $time, j, rf[j*64+63 -: 64], rfExpected[j]);
// $stop;
end
end
end
@ -103,7 +103,7 @@ module testbench_busybear #(parameter XLEN=64, MISA=32'h00000104, ZCSR = 1, ZCOU
//check things!
if (PCF != pcExpected) begin
$display("%t ps: PC does not equal PC expected: %x, %x", $time, PCF, pcExpected);
$stop;
// $stop;
end
end

10
wally-pipelined/wally-busybear.do
View File

@ -77,14 +77,14 @@ add wave -hex /testbench_busybear/dut/dp/regf/rf[28]
add wave -hex /testbench_busybear/dut/dp/regf/rf[29]
add wave -hex /testbench_busybear/dut/dp/regf/rf[30]
add wave -hex /testbench_busybear/dut/dp/regf/rf[31]
#add wave /testbench_busybear/InstrFName
add wave /testbench_busybear/InstrFName
##add wave -hex /testbench_busybear/dut/dp/PCD
#add wave -hex /testbench_busybear/dut/dp/InstrD
#add wave /testbench_busybear/InstrDName
add wave /testbench_busybear/InstrDName
#add wave -divider
##add wave -hex /testbench_busybear/dut/dp/PCE
##add wave -hex /testbench_busybear/dut/dp/InstrE
#add wave /testbench_busybear/InstrEName
add wave /testbench_busybear/InstrEName
#add wave -hex /testbench_busybear/dut/dp/SrcAE
#add wave -hex /testbench_busybear/dut/dp/SrcBE
#add wave -hex /testbench_busybear/dut/dp/ALUResultE
@ -92,14 +92,14 @@ add wave -hex /testbench_busybear/dut/dp/regf/rf[31]
#add wave -divider
##add wave -hex /testbench_busybear/dut/dp/PCM
##add wave -hex /testbench_busybear/dut/dp/InstrM
#add wave /testbench_busybear/InstrMName
add wave /testbench_busybear/InstrMName
#add wave /testbench_busybear/dut/dmem/dtim/memwrite
#add wave -hex /testbench_busybear/dut/dmem/AdrM
#add wave -hex /testbench_busybear/dut/dmem/WriteDataM
#add wave -divider
#add wave -hex /testbench_busybear/dut/dp/PCW
##add wave -hex /testbench_busybear/dut/dp/InstrW
#add wave /testbench_busybear/InstrWName
add wave /testbench_busybear/InstrWName
#add wave /testbench_busybear/dut/dp/RegWriteW
#add wave -hex /testbench_busybear/dut/dp/ResultW
#add wave -hex /testbench_busybear/dut/dp/RdW