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started simplifying integer division special cases
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@ -111,6 +111,43 @@ module fdivsqrtpostproc(
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mux2 #(`DIVb+4) normremdmux(W, W+DM, NegStickyM, NormRemDM);
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mux2 #(`DIVb+4) normremdmux(W, W+DM, NegStickyM, NormRemDM);
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mux2 #(`DIVb+4) normremsmux(NormRemDM, -NormRemDM, AsM, NormRemM);
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mux2 #(`DIVb+4) normremsmux(NormRemDM, -NormRemDM, AsM, NormRemM);
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// special case logic
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always_comb
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if (ALTBM) begin
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if (RemOpM) PreFPIntDivResultM = {{(`DIVb-`XLEN+4){1'b0}}, AM};
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else PreFPIntDivResultM = '0;
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// IntQuotM = '0;
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// IntRemM = {{(`DIVb-`XLEN+4){1'b0}}, AM};
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end else begin
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logic [`DIVb+3:0] PreIntQuotM;
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if (WZeroM) begin
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if (weq0M) begin
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PreIntQuotM = {3'b000, FirstU};
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IntRemM = '0;
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end else begin
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PreIntQuotM = {3'b000, FirstUM};
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IntRemM = '0;
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end
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end else begin
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PreIntQuotM = {3'b000, PreQmM};
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IntRemM = NormRemM;
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end
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// flip sign if necessary
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if (NegQuotM) IntQuotM = -PreIntQuotM;
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else IntQuotM = PreIntQuotM;
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if (RemOpM) begin
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NormShiftM = ALTBM ? '0 : (mM + (`DIVBLEN+1)'(`DIVa)); // no postshift if forwarding input A to remainder
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PreResultM = IntRemM;
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end else begin
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NormShiftM = ((`DIVBLEN+1)'(`DIVb) - (nM * (`DIVBLEN+1)'(`LOGR)));
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PreResultM = IntQuotM;
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end
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PreFPIntDivResultM = $signed(PreResultM >>> NormShiftM);
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end
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assign SpecialFPIntDivResultM = BZeroM ? (RemOpM ? AM : {(`XLEN){1'b1}}) : PreFPIntDivResultM[`XLEN-1:0]; // special cases
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/*
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// Integer division: Special cases
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// Integer division: Special cases
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always_comb
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always_comb
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if (ALTBM) begin
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if (ALTBM) begin
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@ -149,6 +186,7 @@ module fdivsqrtpostproc(
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assign PreFPIntDivResultM = $signed(PreResultM >>> NormShiftM);
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assign PreFPIntDivResultM = $signed(PreResultM >>> NormShiftM);
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assign SpecialFPIntDivResultM = BZeroM ? (RemOpM ? AM : {(`XLEN){1'b1}}) : PreFPIntDivResultM[`XLEN-1:0]; // special cases
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assign SpecialFPIntDivResultM = BZeroM ? (RemOpM ? AM : {(`XLEN){1'b1}}) : PreFPIntDivResultM[`XLEN-1:0]; // special cases
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*/
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// sign extend result for W64
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// sign extend result for W64
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if (`XLEN==64)
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if (`XLEN==64)
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