From 1006305d759f45aefb6f7cfc1a63a0e4ab224dea Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Fri, 30 Dec 2022 07:34:26 -0800
Subject: [PATCH] started simplifying integer division special cases

---
 .../src/fpu/fdivsqrt/fdivsqrtpostproc.sv      | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv b/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
index 258f0eb57..80d9e4b01 100644
--- a/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
+++ b/pipelined/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
@@ -111,6 +111,43 @@ module fdivsqrtpostproc(
     mux2 #(`DIVb+4) normremdmux(W, W+DM, NegStickyM, NormRemDM);
     mux2 #(`DIVb+4) normremsmux(NormRemDM, -NormRemDM, AsM, NormRemM);
 
+    // special case logic
+    always_comb
+      if (ALTBM) begin
+        if (RemOpM) PreFPIntDivResultM = {{(`DIVb-`XLEN+4){1'b0}}, AM};
+        else        PreFPIntDivResultM = '0;
+ //       IntQuotM = '0;
+ //       IntRemM  = {{(`DIVb-`XLEN+4){1'b0}}, AM};
+      end else begin
+        logic [`DIVb+3:0] PreIntQuotM;
+        if (WZeroM) begin
+          if (weq0M) begin
+            PreIntQuotM = {3'b000, FirstU};
+            IntRemM  = '0;
+          end else begin
+            PreIntQuotM = {3'b000, FirstUM};
+            IntRemM  = '0;
+          end 
+        end else begin 
+          PreIntQuotM = {3'b000, PreQmM};
+          IntRemM  = NormRemM;
+        end 
+        // flip sign if necessary
+        if (NegQuotM) IntQuotM = -PreIntQuotM;
+        else          IntQuotM =  PreIntQuotM;
+        if (RemOpM) begin
+          NormShiftM = ALTBM ? '0 : (mM + (`DIVBLEN+1)'(`DIVa)); // no postshift if forwarding input A to remainder
+          PreResultM = IntRemM;
+        end else begin
+          NormShiftM = ((`DIVBLEN+1)'(`DIVb) - (nM * (`DIVBLEN+1)'(`LOGR)));
+          PreResultM = IntQuotM;
+        end
+        PreFPIntDivResultM = $signed(PreResultM >>> NormShiftM);
+      end
+
+    assign SpecialFPIntDivResultM = BZeroM ? (RemOpM ? AM : {(`XLEN){1'b1}}) : PreFPIntDivResultM[`XLEN-1:0]; // special cases
+
+/*
     // Integer division: Special cases
     always_comb
       if (ALTBM) begin
@@ -149,6 +186,7 @@ module fdivsqrtpostproc(
     
     assign PreFPIntDivResultM = $signed(PreResultM >>> NormShiftM);
     assign SpecialFPIntDivResultM = BZeroM ? (RemOpM ? AM : {(`XLEN){1'b1}}) : PreFPIntDivResultM[`XLEN-1:0]; // special cases
+*/
 
     // sign extend result for W64
     if (`XLEN==64)