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David Harris 2022-09-20 04:13:21 -07:00
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pipelined/src/fpu/fdivsqrt/fdivsqrtfgen4.sv
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// Written: David_Harris@hmc.edu, me@KatherineParry.com, cturek@hmc.edu // Written: David_Harris@hmc.edu, me@KatherineParry.com, cturek@hmc.edu
// Modified:13 January 2022 // Modified:13 January 2022
// //
// Purpose: Combined Divide and Square Root Floating Point and Integer Unit // Purpose: Radix 4 F Addend Generator
// //
// A component of the Wally configurable RISC-V project. // A component of the Wally configurable RISC-V project.
// //