Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge a61ad1c649 into 077c13c8b4

Browse Source
This commit is contained in:
Jordan Carlin 2025-02-10 19:30:48 -08:00 committed by GitHub
commit 0ca5a088da
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
9 changed files with 149 additions and 114 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
bin/regression-wally
View File

@ -321,7 +321,7 @@ def addTestsByDir(testDir, config, sim, coverStr, configs, lockstepMode=0, breke
fileStart = "WALLY-COV-ALL" if "cvw-arch-verif/tests" in testDir and "priv" not in testDir and (coverStr == "--fcov" or coverStr == "--ccov") else "" fileStart = "WALLY-COV-ALL" if "cvw-arch-verif/tests" in testDir and "priv" not in testDir and (coverStr == "--fcov" or coverStr == "--ccov") else ""
fileEnd = ".elf" fileEnd = ".elf"
if lockstepMode or coverStr == "--fcov": if lockstepMode or coverStr == "--fcov":
gs = "Mismatches : 0" gs = "** Note: $finish"
elif brekerMode: elif brekerMode:
gs="# trek: info: summary: Test PASSED" gs="# trek: info: summary: Test PASSED"
else: else:

9
bin/wsim
View File

@ -27,7 +27,7 @@ def parseArgs():
parser.add_argument("--tb", "-t", help="Testbench", choices=["testbench", "testbench_fp"], default="testbench") parser.add_argument("--tb", "-t", help="Testbench", choices=["testbench", "testbench_fp"], default="testbench")
parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true") parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true")
parser.add_argument("--ccov", "-c", help="Code Coverage", action="store_true") parser.add_argument("--ccov", "-c", help="Code Coverage", action="store_true")
parser.add_argument("--fcov", "-f", help="Functional Coverage with cvw-arch-verif, implies lockstep", action="store_true") parser.add_argument("--fcov", "-f", help="Functional Coverage with cvw-arch-verif", action="store_true")
parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="") parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="")
parser.add_argument("--params", "-p", help="Optional top-level parameter overrides of the form param=value", default="") parser.add_argument("--params", "-p", help="Optional top-level parameter overrides of the form param=value", default="")
parser.add_argument("--define", "-d", help="Optional define macros passed to simulator", default="") parser.add_argument("--define", "-d", help="Optional define macros passed to simulator", default="")
@ -101,15 +101,13 @@ def prepSim(args, ElfFile):
flagsList.append("--ccov") flagsList.append("--ccov")
if args.fcov: if args.fcov:
flagsList.append("--fcov") flagsList.append("--fcov")
defineList.extend(["+define+INCLUDE_TRACE2COV", "+define+IDV_INCLUDE_TRACE2COV", "+define+COVER_BASE_RV32I"]) # COVER_BASE_RV32I is just needed to keep riscvISACOV happy, but does not affect tests defineList.extend(["+define+ENABLE_RVVI_TRACE", "+define+FCOV"])
argsList.extend(["+TRACE2COV_ENABLE=1", "+IDV_TRACE2COV=1"])
if args.gui: if args.gui:
flagsList.append("--gui") flagsList.append("--gui")
if args.lockstep or args.lockstepverbose: if args.lockstep or args.lockstepverbose:
flagsList.append("--lockstep") flagsList.append("--lockstep")
if args.lockstep or args.lockstepverbose or args.fcov:
prefix = lockstepSetup(args) prefix = lockstepSetup(args)
defineList.append("+define+USE_IMPERAS_DV") defineList.extend(["+define+USE_IMPERAS_DV", "+define+ENABLE_RVVI_TRACE"])
if args.config == "breker": # Requires a license for the breker tool. See tests/breker/README.md for details if args.config == "breker": # Requires a license for the breker tool. See tests/breker/README.md for details
ElfFileNoExtension = os.path.splitext(ElfFile)[0] ElfFileNoExtension = os.path.splitext(ElfFile)[0]
flagsList.append("--breker") flagsList.append("--breker")
@ -154,7 +152,6 @@ def runQuesta(args, flags, prefix):
args.params = fr'--params \"{args.params}\"' args.params = fr'--params \"{args.params}\"'
if args.define: if args.define:
args.define = fr'--define \"{args.define}\"' args.define = fr'--define \"{args.define}\"'
# fcov implies lockstep
cmd = f"do wally.do {args.config} {args.testsuite} {args.tb} {args.args} {args.params} {args.define} {flags}" cmd = f"do wally.do {args.config} {args.testsuite} {args.tb} {args.args} {args.params} {args.define} {flags}"
cmd = f'cd $WALLY/sim/questa; {prefix} vsim {"-c" if not args.gui else ""} -do "{cmd}"' cmd = f'cd $WALLY/sim/questa; {prefix} vsim {"-c" if not args.gui else ""} -do "{cmd}"'
print(f"Running Questa with command: {cmd}") print(f"Running Questa with command: {cmd}")

94
config/rv32gc/coverage.svh
View File

@ -6,60 +6,60 @@
// It defines which extensions are enabled for that config. // It defines which extensions are enabled for that config.
// Define XLEN, used in covergroups // Define XLEN, used in covergroups
`define XLEN32 1 `define XLEN32
// Define relevant addresses // Define relevant addresses
`define ACCESS_FAULT_ADDRESS 32'h0000 `define ACCESS_FAULT_ADDRESS 32'h0000
`define CLINT_BASE 64'h02000000 `define CLINT_BASE 64'h02000000
// Unprivileged extensions // Unprivileged extensions
`include "I_coverage.svh" `define I_COVERAGE
`include "M_coverage.svh" `define M_COVERAGE
`include "F_coverage.svh" `define F_COVERAGE
`include "D_coverage.svh" `define D_COVERAGE
`include "Zba_coverage.svh" `define ZBA_COVERAGE
`include "Zbb_coverage.svh" `define ZBB_COVERAGE
`include "Zbc_coverage.svh" `define ZBC_COVERAGE
`include "Zbs_coverage.svh" `define ZBS_COVERAGE
`include "ZfaF_coverage.svh" `define ZFA_F_COVERAGE
`include "ZfaD_coverage.svh" `define ZFA_D_COVERAGE
`include "ZfaZfh_coverage.svh" `define ZFA_ZFH_COVERAGE
`include "Zfh_coverage.svh" `define ZFA_ZFH_D_COVERAGE
`include "ZfhD_coverage.svh" `define ZFH_COVERAGE
`define ZFH_D_COVERAGE
// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled // Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled
`include "Zfhmin_coverage.svh" `define ZFHMIN_coverage
`define ZFHMIN_D_COVERAGE
// Note: Zmmul is a subset of M, so usually only one or the other would be used. // Note: Zmmul is a subset of M, so usually only one or the other would be used.
`include "Zmmul_coverage.svh" `define ZMMUL_COVERAGE
`include "Zicond_coverage.svh" `define ZICOND_COVERAGE
`include "Zca_coverage.svh" `define ZCA_COVERAGE
`include "Zcb_coverage.svh" `define ZCB_COVERAGE
`include "ZcbM_coverage.svh" `define ZCB_M_COVERAGE
`include "ZcbZbb_coverage.svh" `define ZCB_ZBB_COVERAGE
`include "Zcf_coverage.svh" `define ZCF_COVERAGE
`include "Zcd_coverage.svh" `define ZCD_COVERAGE
`include "Zicsr_coverage.svh" `define ZICSR_COVERAGE
`include "Zbkb_coverage.svh" `define ZBKB_COVERAGE
`include "Zbkc_coverage.svh" `define ZBKC_COVERAGE
`include "Zbkx_coverage.svh" `define ZBKX_COVERAGE
`include "Zknd_coverage.svh" `define ZKND_COVERAGE
`include "Zkne_coverage.svh" `define ZKNE_COVERAGE
`include "Zknh_coverage.svh" `define ZKNH_COVERAGE
`include "Zaamo_coverage.svh" `define ZAAMO_COVERAGE
`include "Zalrsc_coverage.svh" `define ZALRSC_COVERAGE
// Privileged extensions // Privileged extensions
`include "ZicsrM_coverage.svh" `define RV32VM_COVERAGE
`include "ZicsrF_coverage.svh" `define RV32VM_PMP_coverage
`include "ZicsrU_coverage.svh" `define ZICSRM_COVERAGE
`include "RV32VM_coverage.svh" `define ZICSRF_COVERAGE
`include "RV32VM_PMP_coverage.svh" `define ZICSRU_COVERAGE
`include "EndianU_coverage.svh" `define ENDIANU_COVERAGE
`include "EndianM_coverage.svh" `define ENDIANS_COVERAGE
`include "EndianS_coverage.svh" `define ENDIANM_COVERAGE
`include "ExceptionsM_coverage.svh" `define EXCEPTIONSM_COVERAGE
`include "ExceptionsZc_coverage.svh" `define EXCEPTIONSZC_COVERAGE
`include "ZicntrU_coverage.svh" `define ZICNTRU_COVERAGE
`include "ZicntrS_coverage.svh" `define ZICNTRS_COVERAGE
`include "ZicntrM_coverage.svh" `define ZICNTRM_COVERAGE
`include "ZfaZfhD_coverage.svh"
`include "ZfhminD_coverage.svh"

98
config/rv64gc/coverage.svh
View File

@ -6,63 +6,63 @@
// It defines which extensions are enabled for that config. // It defines which extensions are enabled for that config.
// Define XLEN, used in covergroups // Define XLEN, used in covergroups
`define XLEN64 1 `define XLEN64
// Define relevant addresses // Define relevant addresses
`define ACCESS_FAULT_ADDRESS 64'h00000000 `define ACCESS_FAULT_ADDRESS 64'h00000000
`define CLINT_BASE 64'h02000000 `define CLINT_BASE 64'h02000000
// Unprivileged extensions // Unprivileged extensions
`include "I_coverage.svh" `define I_COVERAGE
`include "M_coverage.svh" `define M_COVERAGE
`include "F_coverage.svh" `define F_COVERAGE
`include "D_coverage.svh" `define D_COVERAGE
`include "Zba_coverage.svh" `define ZBA_COVERAGE
`include "Zbb_coverage.svh" `define ZBB_COVERAGE
`include "Zbc_coverage.svh" `define ZBC_COVERAGE
`include "Zbs_coverage.svh" `define ZBS_COVERAGE
`include "ZfaF_coverage.svh" `define ZFA_F_COVERAGE
`include "ZfaD_coverage.svh" `define ZFA_D_COVERAGE
`include "ZfaZfh_coverage.svh" `define ZFA_ZFH_COVERAGE
`include "ZfhD_coverage.svh" `define ZFA_ZFH_D_COVERAGE
`include "Zfh_coverage.svh" `define ZFH_COVERAGE
`define ZFH_D_COVERAGE
// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled // Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled
`include "Zfhmin_coverage.svh" `define ZFHMIN_coverage
`define ZFHMIN_D_COVERAGE
// Note: Zmmul is a subset of M, so usually only one or the other would be used. // Note: Zmmul is a subset of M, so usually only one or the other would be used.
`include "Zmmul_coverage.svh" `define ZMMUL_COVERAGE
`include "Zicond_coverage.svh" `define ZICOND_COVERAGE
`include "Zca_coverage.svh" `define ZCA_COVERAGE
`include "Zcb_coverage.svh" `define ZCB_COVERAGE
`include "ZcbM_coverage.svh" `define ZCB_M_COVERAGE
`include "ZcbZbb_coverage.svh" `define ZCB_ZBB_COVERAGE
`include "ZcbZba_coverage.svh" `define ZCB_ZBA_COVERAGE
`include "Zcd_coverage.svh" `define ZCD_COVERAGE
`include "Zicsr_coverage.svh" `define ZICSR_COVERAGE
`include "Zbkb_coverage.svh" `define ZBKB_COVERAGE
`include "Zbkc_coverage.svh" `define ZBKC_COVERAGE
`include "Zbkx_coverage.svh" `define ZBKX_COVERAGE
`include "Zknd_coverage.svh" `define ZKND_COVERAGE
`include "Zkne_coverage.svh" `define ZKNE_COVERAGE
`include "Zknh_coverage.svh" `define ZKNH_COVERAGE
`include "Zaamo_coverage.svh" `define ZAAMO_COVERAGE
`include "Zalrsc_coverage.svh" `define ZALRSC_COVERAGE
// Privileged extensions // Privileged extensions
`include "RV64VM_coverage.svh" `define RV64VM_COVERAGE
`include "ZicsrM_coverage.svh" `define ZICSRM_COVERAGE
`include "ZicsrF_coverage.svh" `define ZICSRF_COVERAGE
`include "ZicsrU_coverage.svh" `define ZICSRU_COVERAGE
`include "EndianU_coverage.svh" `define ENDIANU_COVERAGE
`include "EndianM_coverage.svh" `define ENDIANS_COVERAGE
`include "EndianS_coverage.svh" `define ENDIANM_COVERAGE
`include "ExceptionsM_coverage.svh" `define EXCEPTIONSM_COVERAGE
`include "ExceptionsZc_coverage.svh" `define EXCEPTIONSZC_COVERAGE
`include "ZicntrU_coverage.svh" `define ZICNTRU_COVERAGE
`include "ZicntrS_coverage.svh" `define ZICNTRS_COVERAGE
`include "ZicntrM_coverage.svh" `define ZICNTRM_COVERAGE
`include "ZfaZfhD_coverage.svh"
`include "ZfhminD_coverage.svh"
// `include "RV64VM_PMP_coverage.svh" // `define RV64VM_PMP_COVERAGE
// `include "RV64CBO_VM_coverage.svh" // `define RV64CBO_VM_COVERAGE
// `include "RV64CBO_PMP_coverage.svh" // `define RV64CBO_PMP_COVERAGE

3
sim/imperas-verbose.ic
View File

@ -1,4 +1,3 @@
# Add Imperas simulator application instruction tracing # Add Imperas simulator application instruction tracing
--verbose --trace --tracechange --traceshowicount --tracemode -tracemem ASX --monitornetschange # --traceafter 300000000 --verbose --trace --tracechange --traceshowicount --tracemode --tracemem XSL --monitornetschange # --traceafter 300000000
--override cpu/debugflags=6 --override cpu/verbose=1 --override cpu/debugflags=6 --override cpu/verbose=1
--override cpu/show_c_prefix=T

8
sim/questa/wally.do
View File

@ -111,15 +111,17 @@ if {[lcheck lst "--ccov"]} {
# if --fcov found set flag and remove from list # if --fcov found set flag and remove from list
if {[lcheck lst "--fcov"]} { if {[lcheck lst "--fcov"]} {
set IMPERAS_HOME $::env(IMPERAS_HOME)
set FunctCoverage 1 set FunctCoverage 1
set FCvlog "+incdir+${FCRVVI}/unpriv \ set FCvlog "+incdir+${FCRVVI}/unpriv \
+incdir+${FCRVVI}/priv +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/rv32_priv \ +incdir+${FCRVVI}/priv +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/rv32_priv \
+incdir+${FCRVVI}/common +incdir+${FCRVVI} \ +incdir+${FCRVVI}/common +incdir+${FCRVVI} \
+incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source" +incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source \
${FCRVVI}/*.sv"
} }
# if --lockstep or --fcov found set flag and remove from list # if --lockstep found set flag and remove from list
if {[lcheck lst "--lockstep"] || $FunctCoverage == 1} { if {[lcheck lst "--lockstep"]} {
set IMPERAS_HOME $::env(IMPERAS_HOME) set IMPERAS_HOME $::env(IMPERAS_HOME)
set lockstep 1 set lockstep 1
set lockstepvlog "+incdir+${IMPERAS_HOME}/ImpPublic/include/host \ set lockstepvlog "+incdir+${IMPERAS_HOME}/ImpPublic/include/host \

31
testbench/common/trace2riscvISACOV.sv Normal file
View File

@ -0,0 +1,31 @@
// trace2riscvISACOV.sv
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
// Load which extensions are supported in this configuration (from $WALLY/config/<config>/coverage.svh)
`include "coverage.svh"
`include "disassemble.svh"
// Load the coverage classes
`include "RISCV_coverage.svh"
module trace2riscvISACOV(rvviTrace rvvi);
string disass;
// Connect coverage class to RVVI trace interface
coverage #(rvvi.ILEN, rvvi.XLEN, rvvi.FLEN, rvvi.VLEN, rvvi.NHART, rvvi.RETIRE) riscvISACOV;
initial begin
riscvISACOV = new(rvvi);
$display("trace2riscvISACOV: coverage initialized");
end
// Invoke the riscvISACOV sample function on each clock edge for the current Instruction
// If RVVI accepts more than one instruction or hart, iterate over all of them in the
// correct order of retirement (TODO: multiple instructions/harts not implemented)
always_ff @(posedge rvvi.clk) begin
if (rvvi.valid[0][0] == 1) begin
disass = disassemble(rvvi.insn[0][0]);
riscvISACOV.sample(rvvi.trap[0][0], 0, 0, {$sformatf("%h ", rvvi.insn[0][0]), disass});
// $display("trace2riscvISACOV: sample taken for instruction %h: %s", rvvi.insn[0][0], disass);
$display("0x%h: %s", rvvi.insn[0][0], disass);
end
end
endmodule

1
testbench/common/wallyTracer.sv
View File

@ -742,6 +742,7 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
end end
always_ff @(posedge clk) begin always_ff @(posedge clk) begin
$display("wallyTracer: %b", rvvi.insn[0][0]);
if(valid) begin if(valid) begin
if(`STD_LOG) begin if(`STD_LOG) begin
$fwrite(file, "%016x, %08x, %s\t\t", rvvi.pc_rdata[0][0], rvvi.insn[0][0], instrWName); $fwrite(file, "%016x, %08x, %s\t\t", rvvi.pc_rdata[0][0], rvvi.insn[0][0], instrWName);

17
testbench/testbench.sv
View File

@ -731,17 +731,22 @@ module testbench;
end end
end end
// RVVI trace for functional coverage and lockstep
`ifdef ENABLE_RVVI_TRACE
rvviTrace #(.XLEN(P.XLEN), .FLEN(P.FLEN)) rvvi();
wallyTracer #(P) wallyTracer(rvvi);
`endif
// Functional coverage
`ifdef FCOV
trace2riscvISACOV trace2riscvISACOV(rvvi);
`endif
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// ImperasDV Co-simulator hooks // ImperasDV Co-simulator hooks
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
`ifdef USE_IMPERAS_DV `ifdef USE_IMPERAS_DV
rvviTrace #(.XLEN(P.XLEN), .FLEN(P.FLEN)) rvvi();
wallyTracer #(P) wallyTracer(rvvi);
trace2log idv_trace2log(rvvi);
trace2cov idv_trace2cov(rvvi);
// enabling of comparison types // enabling of comparison types
trace2api #(.CMP_PC (1), trace2api #(.CMP_PC (1),
.CMP_INS (1), .CMP_INS (1),