mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
Merge a61ad1c649 into 077c13c8b4
This commit is contained in:
Jordan Carlin
GitHub
commit
0ca5a088da
@ -321,7 +321,7 @@ def addTestsByDir(testDir, config, sim, coverStr, configs, lockstepMode=0, breke
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fileStart = "WALLY-COV-ALL" if "cvw-arch-verif/tests" in testDir and "priv" not in testDir and (coverStr == "--fcov" or coverStr == "--ccov") else ""
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fileEnd = ".elf"
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if lockstepMode or coverStr == "--fcov":
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gs = "Mismatches : 0"
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gs = "** Note: $finish"
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elif brekerMode:
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gs="# trek: info: summary: Test PASSED"
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else:
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9
bin/wsim
9
bin/wsim
@ -27,7 +27,7 @@ def parseArgs():
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parser.add_argument("--tb", "-t", help="Testbench", choices=["testbench", "testbench_fp"], default="testbench")
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parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true")
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parser.add_argument("--ccov", "-c", help="Code Coverage", action="store_true")
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parser.add_argument("--fcov", "-f", help="Functional Coverage with cvw-arch-verif, implies lockstep", action="store_true")
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parser.add_argument("--fcov", "-f", help="Functional Coverage with cvw-arch-verif", action="store_true")
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parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="")
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parser.add_argument("--params", "-p", help="Optional top-level parameter overrides of the form param=value", default="")
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parser.add_argument("--define", "-d", help="Optional define macros passed to simulator", default="")
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@ -101,15 +101,13 @@ def prepSim(args, ElfFile):
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flagsList.append("--ccov")
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if args.fcov:
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flagsList.append("--fcov")
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defineList.extend(["+define+INCLUDE_TRACE2COV", "+define+IDV_INCLUDE_TRACE2COV", "+define+COVER_BASE_RV32I"]) # COVER_BASE_RV32I is just needed to keep riscvISACOV happy, but does not affect tests
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argsList.extend(["+TRACE2COV_ENABLE=1", "+IDV_TRACE2COV=1"])
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defineList.extend(["+define+ENABLE_RVVI_TRACE", "+define+FCOV"])
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if args.gui:
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flagsList.append("--gui")
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if args.lockstep or args.lockstepverbose:
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flagsList.append("--lockstep")
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if args.lockstep or args.lockstepverbose or args.fcov:
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prefix = lockstepSetup(args)
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defineList.append("+define+USE_IMPERAS_DV")
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defineList.extend(["+define+USE_IMPERAS_DV", "+define+ENABLE_RVVI_TRACE"])
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if args.config == "breker": # Requires a license for the breker tool. See tests/breker/README.md for details
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ElfFileNoExtension = os.path.splitext(ElfFile)[0]
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flagsList.append("--breker")
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@ -154,7 +152,6 @@ def runQuesta(args, flags, prefix):
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args.params = fr'--params \"{args.params}\"'
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if args.define:
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args.define = fr'--define \"{args.define}\"'
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# fcov implies lockstep
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cmd = f"do wally.do {args.config} {args.testsuite} {args.tb} {args.args} {args.params} {args.define} {flags}"
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cmd = f'cd $WALLY/sim/questa; {prefix} vsim {"-c" if not args.gui else ""} -do "{cmd}"'
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print(f"Running Questa with command: {cmd}")
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@ -6,60 +6,60 @@
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// It defines which extensions are enabled for that config.
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// Define XLEN, used in covergroups
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`define XLEN32 1
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`define XLEN32
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// Define relevant addresses
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`define ACCESS_FAULT_ADDRESS 32'h0000
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`define CLINT_BASE 64'h02000000
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// Unprivileged extensions
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`include "I_coverage.svh"
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`include "M_coverage.svh"
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`include "F_coverage.svh"
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`include "D_coverage.svh"
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`include "Zba_coverage.svh"
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`include "Zbb_coverage.svh"
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`include "Zbc_coverage.svh"
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`include "Zbs_coverage.svh"
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`include "ZfaF_coverage.svh"
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`include "ZfaD_coverage.svh"
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`include "ZfaZfh_coverage.svh"
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`include "Zfh_coverage.svh"
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`include "ZfhD_coverage.svh"
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`define I_COVERAGE
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`define M_COVERAGE
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`define F_COVERAGE
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`define D_COVERAGE
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`define ZBA_COVERAGE
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`define ZBB_COVERAGE
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`define ZBC_COVERAGE
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`define ZBS_COVERAGE
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`define ZFA_F_COVERAGE
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`define ZFA_D_COVERAGE
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`define ZFA_ZFH_COVERAGE
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`define ZFA_ZFH_D_COVERAGE
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`define ZFH_COVERAGE
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`define ZFH_D_COVERAGE
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// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled
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`include "Zfhmin_coverage.svh"
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`define ZFHMIN_coverage
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`define ZFHMIN_D_COVERAGE
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// Note: Zmmul is a subset of M, so usually only one or the other would be used.
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`include "Zmmul_coverage.svh"
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`include "Zicond_coverage.svh"
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`include "Zca_coverage.svh"
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`include "Zcb_coverage.svh"
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`include "ZcbM_coverage.svh"
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`include "ZcbZbb_coverage.svh"
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`include "Zcf_coverage.svh"
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`include "Zcd_coverage.svh"
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`include "Zicsr_coverage.svh"
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`include "Zbkb_coverage.svh"
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`include "Zbkc_coverage.svh"
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`include "Zbkx_coverage.svh"
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`include "Zknd_coverage.svh"
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`include "Zkne_coverage.svh"
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`include "Zknh_coverage.svh"
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`include "Zaamo_coverage.svh"
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`include "Zalrsc_coverage.svh"
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`define ZMMUL_COVERAGE
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`define ZICOND_COVERAGE
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`define ZCA_COVERAGE
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`define ZCB_COVERAGE
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`define ZCB_M_COVERAGE
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`define ZCB_ZBB_COVERAGE
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`define ZCF_COVERAGE
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`define ZCD_COVERAGE
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`define ZICSR_COVERAGE
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`define ZBKB_COVERAGE
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`define ZBKC_COVERAGE
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`define ZBKX_COVERAGE
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`define ZKND_COVERAGE
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`define ZKNE_COVERAGE
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`define ZKNH_COVERAGE
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`define ZAAMO_COVERAGE
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`define ZALRSC_COVERAGE
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// Privileged extensions
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`include "ZicsrM_coverage.svh"
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`include "ZicsrF_coverage.svh"
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`include "ZicsrU_coverage.svh"
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`include "RV32VM_coverage.svh"
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`include "RV32VM_PMP_coverage.svh"
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`include "EndianU_coverage.svh"
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`include "EndianM_coverage.svh"
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`include "EndianS_coverage.svh"
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`include "ExceptionsM_coverage.svh"
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`include "ExceptionsZc_coverage.svh"
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`include "ZicntrU_coverage.svh"
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`include "ZicntrS_coverage.svh"
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`include "ZicntrM_coverage.svh"
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`include "ZfaZfhD_coverage.svh"
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`include "ZfhminD_coverage.svh"
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`define RV32VM_COVERAGE
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`define RV32VM_PMP_coverage
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`define ZICSRM_COVERAGE
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`define ZICSRF_COVERAGE
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`define ZICSRU_COVERAGE
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`define ENDIANU_COVERAGE
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`define ENDIANS_COVERAGE
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`define ENDIANM_COVERAGE
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`define EXCEPTIONSM_COVERAGE
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`define EXCEPTIONSZC_COVERAGE
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`define ZICNTRU_COVERAGE
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`define ZICNTRS_COVERAGE
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`define ZICNTRM_COVERAGE
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@ -6,63 +6,63 @@
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// It defines which extensions are enabled for that config.
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// Define XLEN, used in covergroups
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`define XLEN64 1
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`define XLEN64
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// Define relevant addresses
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`define ACCESS_FAULT_ADDRESS 64'h00000000
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`define CLINT_BASE 64'h02000000
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// Unprivileged extensions
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`include "I_coverage.svh"
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`include "M_coverage.svh"
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`include "F_coverage.svh"
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`include "D_coverage.svh"
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`include "Zba_coverage.svh"
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`include "Zbb_coverage.svh"
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`include "Zbc_coverage.svh"
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`include "Zbs_coverage.svh"
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`include "ZfaF_coverage.svh"
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`include "ZfaD_coverage.svh"
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`include "ZfaZfh_coverage.svh"
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`include "ZfhD_coverage.svh"
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`include "Zfh_coverage.svh"
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`define I_COVERAGE
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`define M_COVERAGE
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`define F_COVERAGE
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`define D_COVERAGE
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`define ZBA_COVERAGE
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`define ZBB_COVERAGE
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`define ZBC_COVERAGE
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`define ZBS_COVERAGE
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`define ZFA_F_COVERAGE
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`define ZFA_D_COVERAGE
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`define ZFA_ZFH_COVERAGE
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`define ZFA_ZFH_D_COVERAGE
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`define ZFH_COVERAGE
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`define ZFH_D_COVERAGE
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// Note: Zfhmin is a subset of Zfh, so usually only one or the other would be used. When Zfhmin and D are supported, ZfhD should also be enabled
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`include "Zfhmin_coverage.svh"
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`define ZFHMIN_coverage
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`define ZFHMIN_D_COVERAGE
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// Note: Zmmul is a subset of M, so usually only one or the other would be used.
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`include "Zmmul_coverage.svh"
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`include "Zicond_coverage.svh"
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`include "Zca_coverage.svh"
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`include "Zcb_coverage.svh"
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`include "ZcbM_coverage.svh"
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`include "ZcbZbb_coverage.svh"
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`include "ZcbZba_coverage.svh"
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`include "Zcd_coverage.svh"
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`include "Zicsr_coverage.svh"
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`include "Zbkb_coverage.svh"
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`include "Zbkc_coverage.svh"
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`include "Zbkx_coverage.svh"
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`include "Zknd_coverage.svh"
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`include "Zkne_coverage.svh"
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`include "Zknh_coverage.svh"
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`include "Zaamo_coverage.svh"
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`include "Zalrsc_coverage.svh"
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`define ZMMUL_COVERAGE
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`define ZICOND_COVERAGE
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`define ZCA_COVERAGE
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`define ZCB_COVERAGE
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`define ZCB_M_COVERAGE
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`define ZCB_ZBB_COVERAGE
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`define ZCB_ZBA_COVERAGE
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`define ZCD_COVERAGE
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`define ZICSR_COVERAGE
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`define ZBKB_COVERAGE
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`define ZBKC_COVERAGE
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`define ZBKX_COVERAGE
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`define ZKND_COVERAGE
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`define ZKNE_COVERAGE
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`define ZKNH_COVERAGE
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`define ZAAMO_COVERAGE
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`define ZALRSC_COVERAGE
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// Privileged extensions
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`include "RV64VM_coverage.svh"
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`include "ZicsrM_coverage.svh"
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`include "ZicsrF_coverage.svh"
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`include "ZicsrU_coverage.svh"
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`include "EndianU_coverage.svh"
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`include "EndianM_coverage.svh"
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`include "EndianS_coverage.svh"
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`include "ExceptionsM_coverage.svh"
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`include "ExceptionsZc_coverage.svh"
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`include "ZicntrU_coverage.svh"
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`include "ZicntrS_coverage.svh"
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`include "ZicntrM_coverage.svh"
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`include "ZfaZfhD_coverage.svh"
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`include "ZfhminD_coverage.svh"
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`define RV64VM_COVERAGE
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`define ZICSRM_COVERAGE
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`define ZICSRF_COVERAGE
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`define ZICSRU_COVERAGE
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`define ENDIANU_COVERAGE
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`define ENDIANS_COVERAGE
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`define ENDIANM_COVERAGE
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`define EXCEPTIONSM_COVERAGE
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`define EXCEPTIONSZC_COVERAGE
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`define ZICNTRU_COVERAGE
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`define ZICNTRS_COVERAGE
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`define ZICNTRM_COVERAGE
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// `include "RV64VM_PMP_coverage.svh"
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// `include "RV64CBO_VM_coverage.svh"
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// `include "RV64CBO_PMP_coverage.svh"
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// `define RV64VM_PMP_COVERAGE
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// `define RV64CBO_VM_COVERAGE
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// `define RV64CBO_PMP_COVERAGE
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@ -1,4 +1,3 @@
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# Add Imperas simulator application instruction tracing
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--verbose --trace --tracechange --traceshowicount --tracemode -tracemem ASX --monitornetschange # --traceafter 300000000
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--verbose --trace --tracechange --traceshowicount --tracemode --tracemem XSL --monitornetschange # --traceafter 300000000
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--override cpu/debugflags=6 --override cpu/verbose=1
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--override cpu/show_c_prefix=T
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@ -111,15 +111,17 @@ if {[lcheck lst "--ccov"]} {
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# if --fcov found set flag and remove from list
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if {[lcheck lst "--fcov"]} {
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set IMPERAS_HOME $::env(IMPERAS_HOME)
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set FunctCoverage 1
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set FCvlog "+incdir+${FCRVVI}/unpriv \
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+incdir+${FCRVVI}/priv +incdir+${FCRVVI}/rv64_priv +incdir+${FCRVVI}/rv32_priv \
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+incdir+${FCRVVI}/common +incdir+${FCRVVI} \
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+incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source"
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+incdir+$env(WALLY)/addins/cvw-arch-verif/riscvISACOV/source \
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${FCRVVI}/*.sv"
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}
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# if --lockstep or --fcov found set flag and remove from list
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if {[lcheck lst "--lockstep"] || $FunctCoverage == 1} {
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# if --lockstep found set flag and remove from list
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if {[lcheck lst "--lockstep"]} {
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set IMPERAS_HOME $::env(IMPERAS_HOME)
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set lockstep 1
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set lockstepvlog "+incdir+${IMPERAS_HOME}/ImpPublic/include/host \
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31
testbench/common/trace2riscvISACOV.sv
Normal file
31
testbench/common/trace2riscvISACOV.sv
Normal file
@ -0,0 +1,31 @@
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// trace2riscvISACOV.sv
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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// Load which extensions are supported in this configuration (from $WALLY/config/<config>/coverage.svh)
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`include "coverage.svh"
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`include "disassemble.svh"
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// Load the coverage classes
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`include "RISCV_coverage.svh"
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module trace2riscvISACOV(rvviTrace rvvi);
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string disass;
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// Connect coverage class to RVVI trace interface
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coverage #(rvvi.ILEN, rvvi.XLEN, rvvi.FLEN, rvvi.VLEN, rvvi.NHART, rvvi.RETIRE) riscvISACOV;
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initial begin
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riscvISACOV = new(rvvi);
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$display("trace2riscvISACOV: coverage initialized");
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end
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// Invoke the riscvISACOV sample function on each clock edge for the current Instruction
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// If RVVI accepts more than one instruction or hart, iterate over all of them in the
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// correct order of retirement (TODO: multiple instructions/harts not implemented)
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always_ff @(posedge rvvi.clk) begin
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if (rvvi.valid[0][0] == 1) begin
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disass = disassemble(rvvi.insn[0][0]);
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riscvISACOV.sample(rvvi.trap[0][0], 0, 0, {$sformatf("%h ", rvvi.insn[0][0]), disass});
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// $display("trace2riscvISACOV: sample taken for instruction %h: %s", rvvi.insn[0][0], disass);
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$display("0x%h: %s", rvvi.insn[0][0], disass);
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end
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end
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endmodule
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@ -742,6 +742,7 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
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end
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always_ff @(posedge clk) begin
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$display("wallyTracer: %b", rvvi.insn[0][0]);
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if(valid) begin
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if(`STD_LOG) begin
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$fwrite(file, "%016x, %08x, %s\t\t", rvvi.pc_rdata[0][0], rvvi.insn[0][0], instrWName);
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@ -731,17 +731,22 @@ module testbench;
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end
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end
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// RVVI trace for functional coverage and lockstep
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`ifdef ENABLE_RVVI_TRACE
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rvviTrace #(.XLEN(P.XLEN), .FLEN(P.FLEN)) rvvi();
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wallyTracer #(P) wallyTracer(rvvi);
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`endif
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// Functional coverage
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`ifdef FCOV
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trace2riscvISACOV trace2riscvISACOV(rvvi);
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`endif
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////////////////////////////////////////////////////////////////////////////////
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// ImperasDV Co-simulator hooks
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////////////////////////////////////////////////////////////////////////////////
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`ifdef USE_IMPERAS_DV
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rvviTrace #(.XLEN(P.XLEN), .FLEN(P.FLEN)) rvvi();
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wallyTracer #(P) wallyTracer(rvvi);
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trace2log idv_trace2log(rvvi);
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trace2cov idv_trace2cov(rvvi);
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// enabling of comparison types
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trace2api #(.CMP_PC (1),
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.CMP_INS (1),
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