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Reduced cache fsm complexity.
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parent
c3da4c3c31
commit
08549446ef
3
src/cache/cachefsm.sv
vendored
3
src/cache/cachefsm.sv
vendored
@ -130,8 +130,7 @@ module cachefsm import cvw::*; #(parameter cvw_t P,
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STATE_READ_HOLD: if(Stall) NextState = STATE_READ_HOLD;
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STATE_READ_HOLD: if(Stall) NextState = STATE_READ_HOLD;
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else NextState = STATE_READY;
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else NextState = STATE_READY;
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// exclusion-tag-start: icache case
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// exclusion-tag-start: icache case
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STATE_WRITEBACK: if (CacheBusAck & (CMOp[1] | CMOp[2])) NextState = STATE_READ_HOLD;
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STATE_WRITEBACK: if(CacheBusAck & ~CMOp[3]) NextState = STATE_FETCH;
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else if(CacheBusAck & ~CMOp[3]) NextState = STATE_FETCH;
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else if(CacheBusAck) NextState = STATE_READ_HOLD;
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else if(CacheBusAck) NextState = STATE_READ_HOLD;
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else NextState = STATE_WRITEBACK;
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else NextState = STATE_WRITEBACK;
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// eviction needs a delay as the bus fsm does not correctly handle sending the write command at the same time as getting back the bus ack.
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// eviction needs a delay as the bus fsm does not correctly handle sending the write command at the same time as getting back the bus ack.
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