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https://github.com/openhwgroup/cvw
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Optimized Inverse Mixcolumn
This commit is contained in:
KelvinTr
parent
5b445946b1
commit
00b61390d9
@ -1,8 +1,8 @@
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///////////////////////////////////////////
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// aes_inv_mixcolumns.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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// Written: kelvin.tran@okstate.edu, james.stine@okstate.edu
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// Created: 05 March 2024
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//
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// Purpose: AES Inverted Mix Column Function for use with AES
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//
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@ -25,52 +25,22 @@
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module aes_inv_mixcolumns(input logic [31:0] word, output logic [31:0] mixed_word);
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module aes_inv_mixcolumns(input logic [31:0] in, output logic [31:0] out);
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// Instantiate Internal Logic
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logic [7:0] b0, b1, b2, b3;
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logic [7:0] mb0, mb1, mb2, mb3;
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logic [7:0] in0, in1, in2, in3, temp;
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logic [10:0] xor0, xor1, xor2, xor3;
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logic [7:0] gm9_mb0, gm11_mb0, gm13_mb0, gm14_mb0;
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logic [7:0] gm9_mb1, gm11_mb1, gm13_mb1, gm14_mb1;
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logic [7:0] gm9_mb2, gm11_mb2, gm13_mb2, gm14_mb2;
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logic [7:0] gm9_mb3, gm11_mb3, gm13_mb3, gm14_mb3;
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assign {in0, in1, in2, in3} = in;
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assign temp = in0 ^ in1 ^ in2 ^ in3;
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// Break up word into 1 byte slices
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assign b0 = word[31:24];
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assign b1 = word[23:16];
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assign b2 = word[15:8];
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assign b3 = word[7:0];
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// mb0 Galois components
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gm9 gm9_0(.gm9_In(b1), .gm9_Out(gm9_mb0));
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gm11 gm11_0(.gm11_In(b3), .gm11_Out(gm11_mb0));
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gm13 gm13_0(.gm13_In(b2), .gm13_Out(gm13_mb0));
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gm14 gm14_0(.gm14_In(b0), .gm14_Out(gm14_mb0));
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assign xor0 = {temp, 3'b0} ^ {1'b0, in3^in1, 2'b0} ^ {2'b0, in3^in2, 1'b0} ^ {3'b0, temp} ^ {3'b0, in3};
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assign xor1 = {temp, 3'b0} ^ {1'b0, in2^in0, 2'b0} ^ {2'b0, in2^in1, 1'b0} ^ {3'b0, temp} ^ {3'b0, in2};
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assign xor2 = {temp, 3'b0} ^ {1'b0, in1^in3, 2'b0} ^ {2'b0, in1^in0, 1'b0} ^ {3'b0, temp} ^ {3'b0, in1};
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assign xor3 = {temp, 3'b0} ^ {1'b0, in0^in2, 2'b0} ^ {2'b0, in0^in3, 1'b0} ^ {3'b0, temp} ^ {3'b0, in0};
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// mb1 Galois components
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gm9 gm9_1(.gm9_In(b2), .gm9_Out(gm9_mb1));
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gm11 gm11_1(.gm11_In(b0), .gm11_Out(gm11_mb1));
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gm13 gm13_1(.gm13_In(b3), .gm13_Out(gm13_mb1));
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gm14 gm14_1(.gm14_In(b1), .gm14_Out(gm14_mb1));
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// mb2 Galois components
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gm9 gm9_2(.gm9_In(b3), .gm9_Out(gm9_mb2));
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gm11 gm11_2(.gm11_In(b1), .gm11_Out(gm11_mb2));
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gm13 gm13_2(.gm13_In(b0), .gm13_Out(gm13_mb2));
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gm14 gm14_2(.gm14_In(b2), .gm14_Out(gm14_mb2));
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// mb3 Galois components
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gm9 gm9_3(.gm9_In(b0), .gm9_Out(gm9_mb3));
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gm11 gm11_3(.gm11_In(b2), .gm11_Out(gm11_mb3));
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gm13 gm13_3(.gm13_In(b1), .gm13_Out(gm13_mb3));
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gm14 gm14_3(.gm14_In(b3), .gm14_Out(gm14_mb3));
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galoismult_inverse gm0 (xor0, out[7:0]);
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galoismult_inverse gm1 (xor1, out[15:8]);
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galoismult_inverse gm2 (xor2, out[23:16]);
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galoismult_inverse gm3 (xor3, out[31:24]);
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// XOR Galois components and assign output
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assign mb0 = gm9_mb0 ^ gm11_mb0 ^ gm13_mb0 ^ gm14_mb0;
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assign mb1 = gm9_mb1 ^ gm11_mb1 ^ gm13_mb1 ^ gm14_mb1;
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assign mb2 = gm9_mb2 ^ gm11_mb2 ^ gm13_mb2 ^ gm14_mb2;
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assign mb3 = gm9_mb3 ^ gm11_mb3 ^ gm13_mb3 ^ gm14_mb3;
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assign mixed_word = {mb0, mb1, mb2, mb3};
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endmodule // inv_mixword
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endmodule
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@ -29,7 +29,6 @@
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module aes_mixcolumns(input logic [31:0] in, output logic [31:0] out);
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logic [7:0] in0, in1, in2, in3, out0, out1, out2, out3, t0, t1, t2, t3, temp;
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logic [15:0] rrot8_1, rrot8_2;
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assign {in0, in1, in2, in3} = in;
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assign temp = in0 ^ in1 ^ in2 ^ in3;
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@ -25,7 +25,7 @@
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module galoismult_forward(input logic [7:0] in, output logic [7:0] out);
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module galoismult_forward(input logic [7:0] in, output logic [7:0] out);
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logic [7:0] leftshift;
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@ -1,7 +1,7 @@
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///////////////////////////////////////////
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// gm2.sv
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// galoismult_inverse.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu, David_Harris@hmc.edu
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// Written: kelvin.tran@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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@ -25,12 +25,12 @@
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm2 (gm2_In, gm2_Out);
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input logic [7:0] gm2_In;
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output logic [7:0] gm2_Out;
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// Set output to Galois Mult 2
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assign gm2_Out = {gm2_In[6:0], 1'b0} ^ (8'h1b & {8{gm2_In[7]}});
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endmodule
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module galoismult_inverse(input logic [10:0] in, output logic [7:0] out);
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logic [7:0] temp0, temp1;
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assign temp0 = in[8] ? (in[7:0] ^ 8'b00011011) : in[7:0];
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assign temp1 = in[9] ? (temp0 ^ 8'b00110110) : temp0;
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assign out = in[10] ? (temp1 ^ 8'b01101100) : temp1;
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endmodule
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@ -1,44 +0,0 @@
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///////////////////////////////////////////
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// gm11.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm11(gm11_In, gm11_Out);
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input logic [7:0] gm11_In;
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output logic [7:0] gm11_Out;
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// Internal Logic
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logic [7:0] gm8_0_Out;
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logic [7:0] gm2_0_Out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_In(gm11_In), .gm8_Out(gm8_0_Out));
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gm2 gm2_0 (.gm2_In(gm11_In), .gm2_Out(gm2_0_Out));
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// Set output to gm8(in) ^ gm2(in) ^ in
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assign gm11_Out = gm8_0_Out ^ gm2_0_Out ^ gm11_In;
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endmodule
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@ -1,44 +0,0 @@
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///////////////////////////////////////////
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// gm13.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm13(gm13_In, gm13_Out);
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input logic [7:0] gm13_In;
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output logic [7:0] gm13_Out;
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// Internal Logic
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logic [7:0] gm8_0_Out;
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logic [7:0] gm4_0_Out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_In(gm13_In), .gm8_Out(gm8_0_Out));
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gm4 gm4_0 (.gm4_In(gm13_In), .gm4_Out(gm4_0_Out));
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// Set output to gm8(in) ^ gm4(in) ^ in
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assign gm13_Out = gm8_0_Out ^ gm4_0_Out ^ gm13_In;
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endmodule
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@ -1,47 +0,0 @@
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///////////////////////////////////////////
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// gm14.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm14(gm14_In, gm14_Out);
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input logic [7:0] gm14_In;
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output logic [7:0] gm14_Out;
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// Internal Logic
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logic [7:0] gm8_0_Out;
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logic [7:0] gm4_0_Out;
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logic [7:0] gm2_0_Out;
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// Sub-Modules for sub-Galois operations
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gm8 gm8_0 (.gm8_In(gm14_In), .gm8_Out(gm8_0_Out));
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gm4 gm4_0 (.gm4_In(gm14_In), .gm4_Out(gm4_0_Out));
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gm2 gm2_0 (.gm2_In(gm14_In), .gm2_Out(gm2_0_Out));
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//Assign output to gm8(in) ^ gm4(in) ^ gm2(in)
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assign gm14_Out = gm8_0_Out ^ gm4_0_Out ^ gm2_0_Out;
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endmodule
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@ -1,42 +0,0 @@
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///////////////////////////////////////////
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// gm3.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm3(gm3_In, gm3_Out);
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input logic [7:0] gm3_In;
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output logic [7:0] gm3_Out;
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// Internal Logic
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logic [7:0] gm2_0_Out;
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// Sub-Modules for gm2 multiplication
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gm2 gm2_0 (.gm2_In(gm3_In), .gm2_Out(gm2_0_Out));
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// Assign Output
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assign gm3_Out = gm2_0_Out ^ gm3_In;
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endmodule
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@ -1,44 +0,0 @@
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///////////////////////////////////////////
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// gm4.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm4(gm4_In, gm4_Out);
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input logic [7:0] gm4_In;
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output logic [7:0] gm4_Out;
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// Internal Logic
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logic [7:0] gm2_0_Out;
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logic [7:0] gm2_1_Out;
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// Sub-Modules for multiple gm2 multiplications
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gm2 gm2_0 (.gm2_In(gm4_In), .gm2_Out(gm2_0_Out));
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gm2 gm2_1 (.gm2_In(gm2_0_Out), .gm2_Out(gm2_1_Out));
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// Assign output to second gm2 output
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assign gm4_Out = gm2_1_Out;
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endmodule
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@ -1,44 +0,0 @@
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///////////////////////////////////////////
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// gm8.sv
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//
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// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
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// Created: 20 February 2024
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//
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// Purpose: Galois field operations for mix columns operation
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module gm8(gm8_In, gm8_Out);
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input logic [7:0] gm8_In;
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output logic [7:0] gm8_Out;
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// Internal Logic
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logic [7:0] gm2_0_Out;
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logic [7:0] gm4_0_Out;
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// Sub-Modules for sub-Galois operations
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gm4 gm4_0 (.gm4_In(gm8_In), .gm4_Out(gm4_0_Out));
|
||||
gm2 gm2_0 (.gm2_In(gm4_0_Out), .gm2_Out(gm2_0_Out));
|
||||
|
||||
// Assign output to gm2 output
|
||||
assign gm8_Out = gm2_0_Out;
|
||||
|
||||
endmodule
|
||||
@ -1,42 +0,0 @@
|
||||
///////////////////////////////////////////
|
||||
// gm9.sv
|
||||
//
|
||||
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
|
||||
// Created: 20 February 2024
|
||||
//
|
||||
// Purpose: Galois field operations for mix columns operation
|
||||
//
|
||||
// A component of the CORE-V-WALLY configurable RISC-V project.
|
||||
// https://github.com/openhwgroup/cvw
|
||||
//
|
||||
// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
module gm9(gm9_In, gm9_Out);
|
||||
|
||||
input logic [7:0] gm9_In;
|
||||
output logic [7:0] gm9_Out;
|
||||
|
||||
// Internal Logic
|
||||
logic [7:0] gm8_0_Out;
|
||||
|
||||
// Sub-Modules for sub-Galois operations
|
||||
gm8 gm8_0 (.gm8_In(gm9_In), .gm8_Out(gm8_0_Out));
|
||||
|
||||
// Set output to gm8(in) ^ in
|
||||
assign gm9_Out = gm8_0_Out ^ gm9_In;
|
||||
|
||||
endmodule
|
||||
@ -46,7 +46,7 @@ module aes32dsi(input logic [1:0] bs,
|
||||
assign Sbox_In = Sbox_In_32[7:0];
|
||||
|
||||
// Apply inverse sbox to si
|
||||
aes_Inv_Sbox inv_sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
aes_inv_sbox inv_sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
|
||||
// Pad output of inverse substitution box
|
||||
assign so = {24'h0, Sbox_Out};
|
||||
|
||||
@ -47,13 +47,13 @@ module aes32dsmi(input logic [1:0] bs,
|
||||
assign Sbox_In = Sbox_In_32[7:0];
|
||||
|
||||
// Apply inverse sbox to si
|
||||
aes_Inv_Sbox inv_sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
aes_inv_sbox inv_sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
|
||||
// Pad output of inverse substitution box
|
||||
assign so = {24'h0, Sbox_Out};
|
||||
|
||||
// Run so through the mixword AES function
|
||||
aes_Inv_Mixcolumns mix(.word(so), .mixed_word(mixed));
|
||||
aes_inv_mixcolumns mix(.in(so), .out(mixed));
|
||||
|
||||
// Rotate the substitution box output left by shamt (bs * 8)
|
||||
assign mixed_rotate = (mixed << shamt) | (mixed >> (32 - shamt));
|
||||
|
||||
@ -48,7 +48,7 @@ module aes32esi(input logic [1:0] bs,
|
||||
assign Sbox_In = Sbox_In_32[7:0];
|
||||
|
||||
// Substitute
|
||||
aes_Sbox subbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
aes_sbox subbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
|
||||
// Pad sbox output
|
||||
assign so = {24'h0, Sbox_Out};
|
||||
|
||||
@ -49,13 +49,13 @@ module aes32esmi(input logic [1:0] bs,
|
||||
assign Sbox_In = Sbox_In_32[7:0];
|
||||
|
||||
// Substitute
|
||||
aes_Sbox sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
aes_sbox sbox(.in(Sbox_In), .out(Sbox_Out));
|
||||
|
||||
// Pad sbox output
|
||||
assign so = {24'h0, Sbox_Out};
|
||||
|
||||
// Mix Word using aes_mixword component
|
||||
aes_Mixcolumns mwd(.in(so), .out(mixed));
|
||||
aes_mixcolumns mwd(.in(so), .out(mixed));
|
||||
|
||||
// Rotate so left by shamt
|
||||
assign mixed_rotate = (mixed << shamt) | (mixed >> (32 - shamt));
|
||||
|
||||
@ -35,11 +35,11 @@ module aes64ds(input logic [63:0] rs1,
|
||||
logic [31:0] Sbox_Out_1;
|
||||
|
||||
// Apply inverse shiftrows to rs2 and rs1
|
||||
aes_Inv_Shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
aes_inv_shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
|
||||
// Apply full word inverse substitution to lower 2 words of shiftrow out
|
||||
aes_Inv_Sbox_Word inv_sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out_0));
|
||||
aes_Inv_Sbox_Word inv_sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out_1));
|
||||
aes_inv_sbox_word inv_sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out_0));
|
||||
aes_inv_sbox_word inv_sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out_1));
|
||||
|
||||
// Concatenate the two substitution outputs to get result
|
||||
assign Data_Out = {Sbox_Out_1, Sbox_Out_0};
|
||||
|
||||
@ -37,15 +37,15 @@ module aes64dsm(input logic [63:0] rs1,
|
||||
logic [31:0] Mixcol_Out_1;
|
||||
|
||||
// Apply inverse shiftrows to rs2 and rs1
|
||||
aes_Inv_Shiftrow srow(.DataIn({rs2, rs1}), .DataOut(ShiftRow_Out));
|
||||
aes_inv_shiftrow srow(.DataIn({rs2, rs1}), .DataOut(ShiftRow_Out));
|
||||
|
||||
// Apply full word inverse substitution to lower 2 words of shiftrow out
|
||||
aes_Inv_Sbox_Word inv_sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out_0));
|
||||
aes_Inv_Sbox_Word inv_sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out_1));
|
||||
aes_inv_sbox_word inv_sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out_0));
|
||||
aes_inv_sbox_word inv_sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out_1));
|
||||
|
||||
// Apply inverse mixword to sbox outputs
|
||||
aes_Inv_Mixcolumns inv_mw_0(.word(Sbox_Out_0), .mixed_word(Mixcol_Out_0));
|
||||
aes_Inv_Mixcolumns inv_mw_1(.word(Sbox_Out_1), .mixed_word(Mixcol_Out_1));
|
||||
aes_inv_mixcolumns inv_mw_0(.in(Sbox_Out_0), .out(Mixcol_Out_0));
|
||||
aes_inv_mixcolumns inv_mw_1(.in(Sbox_Out_1), .out(Mixcol_Out_1));
|
||||
|
||||
// Concatenate mixed words for output
|
||||
assign Data_Out = {Mixcol_Out_1, Mixcol_Out_0};
|
||||
|
||||
@ -33,9 +33,9 @@ module aes64es(input logic [63:0] rs1,
|
||||
logic [127:0] ShiftRow_Out;
|
||||
|
||||
// AES shiftrow unit
|
||||
aes_Shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
aes_shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
|
||||
// Apply substitution box to 2 lower words
|
||||
aes_Sbox_Word sbox_0(.in(ShiftRow_Out[31:0]), .out(Data_Out[31:0]));
|
||||
aes_Sbox_Word sbox_1(.in(ShiftRow_Out[63:32]), .out(Data_Out[63:32]));
|
||||
aes_sbox_word sbox_0(.in(ShiftRow_Out[31:0]), .out(Data_Out[31:0]));
|
||||
aes_sbox_word sbox_1(.in(ShiftRow_Out[63:32]), .out(Data_Out[63:32]));
|
||||
endmodule
|
||||
|
||||
@ -34,13 +34,13 @@ module aes64esm(input logic [63:0] rs1,
|
||||
logic [63:0] Sbox_Out;
|
||||
|
||||
// AES shiftrow unit
|
||||
aes_Shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
aes_shiftrow srow(.DataIn({rs2,rs1}), .DataOut(ShiftRow_Out));
|
||||
|
||||
// Apply substitution box to 2 lower words
|
||||
aes_Sbox_Word sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out[31:0]));
|
||||
aes_Sbox_Word sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out[63:32]));
|
||||
aes_sbox_word sbox_0(.in(ShiftRow_Out[31:0]), .out(Sbox_Out[31:0]));
|
||||
aes_sbox_word sbox_1(.in(ShiftRow_Out[63:32]), .out(Sbox_Out[63:32]));
|
||||
|
||||
// Apply mix columns operations
|
||||
aes_Mixcolumns mw0(.in(Sbox_Out[31:0]), .out(Data_Out[31:0]));
|
||||
aes_Mixcolumns mw1(.in(Sbox_Out[63:32]), .out(Data_Out[63:32]));
|
||||
aes_mixcolumns mw0(.in(Sbox_Out[31:0]), .out(Data_Out[31:0]));
|
||||
aes_mixcolumns mw1(.in(Sbox_Out[63:32]), .out(Data_Out[63:32]));
|
||||
endmodule
|
||||
|
||||
@ -28,6 +28,6 @@
|
||||
module aes64im(input logic [63:0] rs1,
|
||||
output logic [63:0] Data_Out);
|
||||
|
||||
aes_Inv_Mixcolumns inv_mw_0(.word(rs1[31:0]), .mixed_word(Data_Out[31:0]));
|
||||
aes_Inv_Mixcolumns inv_mw_1(.word(rs1[63:32]), .mixed_word(Data_Out[63:32]));
|
||||
aes_inv_mixcolumns inv_mw_0(.in(rs1[31:0]), .out(Data_Out[31:0]));
|
||||
aes_inv_mixcolumns inv_mw_1(.in(rs1[63:32]), .out(Data_Out[63:32]));
|
||||
endmodule
|
||||
|
||||
@ -53,7 +53,7 @@ module aes64ks1i(input logic [3:0] roundnum,
|
||||
assign tmp2 = lastRoundFlag ? rs1[63:32] : rs1_rotate;
|
||||
|
||||
// Substitute bytes of value obtained for tmp2 using Rijndael sbox
|
||||
aes_Sbox_Word sbox(.in(tmp2),.out(Sbox_Out));
|
||||
aes_sbox_word sbox(.in(tmp2),.out(Sbox_Out));
|
||||
assign rd[31:0] = Sbox_Out ^ rcon;
|
||||
assign rd[63:32] = Sbox_Out ^ rcon;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user